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Assistant Computer Chip Engineer Jobs in Milpitas, CA

Drive chip development execution from RTL to GDSII, ensuring architecture, implementation, and ... Bachelor's degree in Electrical Engineering, Computer Engineering, or related field * 15+ years of ...

Description We are seeking a Sr. Mechanical Design Engineer to join our multi-disciplinary team ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Efficient Computer is looking for a Test Engineer with hands-on DFT and fabless semiconductor test ... Own test engineering across multiple active chip programs simultaneously * Build scalable test ...

Technical Support Engineer

Fremont, CA · On-site

$100K - $148K/yr

The technical support engineer will apply scientific methodologies and robust statistical ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Test Engineer

San Jose, CA · On-site

$150K - $190K/yr

Efficient Computer is a fabless semiconductor startup headquartered in Pittsburgh, PA, building ... Own test engineering across multiple active chip programs simultaneously * Build scalable test ...

Technical Support Engineer

Fremont, CA · On-site

$100K - $148K/yr

The technical support engineer will apply scientific methodologies and robust statistical ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

The Sr. Field Service Engineer will perform advanced engineering and technical activities while ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Hardware Engineering Manager

Fremont, CA · On-site

$200K - $240K/yr

Description The Hardware Engineering Manager will work on the development of next generation NOVA ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Showing results 41-60

Assistant Computer Chip Engineer information

See Milpitas, CA salary details

$38.5K

$103.4K

$156.7K

How much do assistant computer chip engineer jobs pay per year?

As of Aug 11, 2026, the average yearly pay for assistant computer chip engineer in Milpitas, CA is $103,432.00, according to ZipRecruiter salary data. Most workers in this role earn between $82,200.00 and $121,800.00 per year, depending on experience, location, and employer.

What is the difference between Assistant Computer Chip Engineer vs Hardware Design Engineer?

AspectAssistant Computer Chip EngineerHardware Design Engineer
Required CredentialsBachelor's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields
Work EnvironmentResearch labs, semiconductor companies, tech firmsDesign firms, semiconductor companies, tech corporations
Employer & Industry UsageCommon in tech and semiconductor industriesUsed in hardware development and chip design sectors
Common Search & ComparisonYesYes

The Assistant Computer Chip Engineer typically supports chip development through testing and analysis, often working under senior engineers. Hardware Design Engineers focus on designing and developing the physical architecture of chips. Both roles require similar educational backgrounds and are integral to the semiconductor industry, but they differ mainly in responsibilities and focus areas.

What are the most commonly searched types of Computer Chip Engineer jobs in Milpitas, CA? The most popular types of Computer Chip Engineer jobs in Milpitas, CA are:
What are popular job titles related to Assistant Computer Chip Engineer jobs in Milpitas, CA? For Assistant Computer Chip Engineer jobs in Milpitas, CA, the most frequently searched job titles are:
What job categories do people searching Assistant Computer Chip Engineer jobs in Milpitas, CA look for? The top searched job categories for Assistant Computer Chip Engineer jobs in Milpitas, CA are:
What cities near Milpitas, CA are hiring for Assistant Computer Chip Engineer jobs? Cities near Milpitas, CA with the most Assistant Computer Chip Engineer job openings:
Infographic showing various Assistant Computer Chip Engineer job openings in Milpitas, CA as of June 2026, with employment types broken down into 8% As Needed, 65% Full Time, 23% Part Time, and 4% Temporary. Highlights an 94% Physical, 3% Hybrid, and 3% Remote job distribution, with an average salary of $103,432 per year, or $49.7 per hour.

Chip Lead, Senior Director

Astera Labs

San Jose, CA • On-site

Full-time

Re-posted 2 days ago


Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Astera Labs is seeking an Senior Director OR Associate Vice President, Product Technical Lead (Chip Lead) to drive the end-to-end success of our next-generation UALink switching products in San Jose. This is an executive technical leadership role where you will connect architecture, design, validation, firmware, systems, and operations to ensure clarity, alignment, and predictable execution across the full product lifecycle.
As the technical integrator for the product line, you will lead through influence and cross-functional authority, working on cutting-edge UALink, UCIe, and PCIe Gen6/Gen7 technologies that power the largest AI clusters in the world. You'll be the central technical voice ensuring our switching products scale with Astera's hyper-growth while delivering world-class silicon to customers enabling rack-scale AI and hyperscale data centers.
Location - San Jose, CA OR Israel
Key Responsibilities
  • Product Technical Ownership
  • Own the full technical lifecycle of the product line-architecture assumptions, design integration, validation strategy, readiness, and customer enablement
  • Drive chip development execution from RTL to GDSII, ensuring architecture, implementation, and tapeout milestones are met
  • Lead development of large-scale chips (300-400mm²) utilizing 2.5D/3D advanced packaging technologies and chiplet-based architectures
  • Reduce ambiguity by translating product requirements into clear priorities, tradeoffs, and execution paths
  • Own the Chip Tapeout and Chip signoff with full responsibility on Chip Quality.
  • Cross-Functional Technical Leadership
  • Anticipate challenges early, drive alignment across all engineering functions, ensuring risks, dependencies, and decisions are surfaced and resolved at the earliest
  • Partner with design verification teams to define coverage goals, regression strategies, and sign-off criteria
  • Collaborate with DFT teams on test architecture, scan insertion, BIST, and manufacturing test strategies
  • Work closely with physical design teams on timing closure, power optimization, and backend execution
  • Process Excellence & Organizational Development
  • Establish and reinforce scalable processes, documentation, and handoffs that support company growth
  • Provide structured, data-driven decision-making and maintain a crisp operational cadence across the product line
  • Transform conflicts to foster a culture of ownership over ego, mentoring and elevating teams while strengthening technical judgment, accountability, and cross-functional collaboration
  • Model steady, calm leadership, particularly in high-stakes or ambiguous situations
  • Shape engineering culture and talent strategy to support Astera's rapid growth trajectory

Basic Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
  • 15+ years of experience across architecture, silicon design, validation, systems, or related domains
  • Proven track record of developing large-scale chips (300mm²+) through successful tapeout
  • Hands-on experience with 2.5D and 3D advanced packaging technologies and chiplet-based architectures
  • Strong understanding of RTL design, design verification, DFT, and physical design flows
  • Experience with high-speed serial interfaces such as PCIe, Ethernet, or switching architectures
  • Demonstrated executive leadership of cross-functional technical programs with end-to-end product cycle ownership
  • Strong communication and executive presence with the ability to influence at all levels of the organization

Preferred Qualifications
  • Master's degree in Electrical Engineering or Computer Engineering
  • Experience with UALink, UCIe, PCIe Gen5/Gen6/Gen7, or Ethernet switching architectures
  • Experience with advanced process nodes (7nm, 5nm, or below)
  • Background in power management, clocking architectures, or high-speed analog integration
  • Experience operating in fast-growing startups or hyper-scale environments

Key Leadership Competencies
  • Systems Thinking: See the big picture while managing details
  • Emotional Intelligence: Calm under pressure, empathetic, and influential
  • Adaptability: Thrive in ambiguity and fast-changing environments
  • Execution Discipline: Deliver predictable results without sacrificing innovation

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.