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Asic Verification Manager Jobs in Seattle, WA (NOW HIRING)

K2 Space

Principal ASIC Design Verification Engineer

Seattle, WA · On-site

$190K - $285K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...

K2 Space

Senior ASIC Design Verification Engineer

Seattle, WA · On-site

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, and ...

K2 Space

Senior ASIC Design Verification Engineer

Seattle, WA · On-site

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, and ...

Socket.dev

ASIC Design Verification Engineer

Seattle, WA · On-site

$130 - $200/hr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, and hardware ...

K2 Space

Senior ASIC Emulation Engineer

Seattle, WA · On-site

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

Accelerate overall verification throughput by helping DV team run targeted and highvalue tests in ... Manage interactions with external IP providers or emulation partners when needed. Qualifications

K2 Space

Senior ASIC Emulation Engineer

Seattle, WA · On-site

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

Accelerate overall verification throughput by helping DV team run targeted and high-value tests in ... Manage interactions with external IP providers or emulation partners when needed. Qualifications

K2 Space

Senior ASIC Emulation Engineer

Seattle, WA

$170K - $250K/yr

Accelerate overall verification throughput by helping DV team run targeted and high‑value tests ... Manage interactions with external IP providers or emulation partners when needed. Qualifications

Blue Origin

Senior ASIC Design Engineer - Terawave

Seattle, WA · On-site

$230K - $322K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

... ASIC designsculminate in thoroughly validatedcutting-edge integrated circuits that drive Blue ... The candidate will be responsible for driving verification methodologies, managing test planning ...

K2 Space

Senior ASIC Physical Design Engineer

Seattle, WA · On-site

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

Collaborate with front-end, verification, and DFT teams to ensure clean handoff and predictable ... Familiarity with physical design service vendor management or offshore collaboration. * Experience ...

K2 Space

Senior ASIC Physical Design Engineer

Seattle, WA · On-site

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

Collaborate with front-end, verification, and DFT teams to ensure clean handoff and predictable ... Familiarity with physical design service vendor management or offshore collaboration. * Experience ...

K2 Space

Principal ASIC Physical Design Engineer

Seattle, WA · On-site

$190K - $280K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

This role also involves managing external physical design partners, driving tool and flow decisions ... Collaborate with front-end and verification teams to ensure clean handoffs, timing closure, and ...

Mundi

Principal ASIC Physical Design Engineer

Seattle, WA · On-site

$190 - $280/hr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

This role also involves managing external physical design partners, driving tool and flow decisions ... Collaborate with front‑end and verification teams to ensure clean handoffs, timing closure, and ...

K2 Space

Principal ASIC Physical Design Engineer

Seattle, WA · On-site

$190K - $280K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

This role also involves managing external physical design partners, driving tool and flow decisions ... Collaborate with front-end and verification teams to ensure clean handoffs, timing closure, and ...

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All JobsAsic Verification JobsAsic Verification Manager JobsAsic Verification Manager Jobs in Seattle, WA

Asic Verification Manager information

See Seattle, WA salary details

$29.2K

$156.3K

$237.6K

How much do asic verification manager jobs pay per year?

As of Aug 13, 2026, the average yearly pay for asic verification manager in Seattle, WA is $156,256.00, according to ZipRecruiter salary data. Most workers in this role earn between $102,819.00 and $205,639.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Asic Verification Manager position, and why are they important?

To thrive as an ASIC Verification Manager, you need a deep understanding of digital design and verification methodologies, experience with hardware description languages (HDLs) such as Verilog or VHDL, and a degree in electrical engineering or a related field. Familiarity with verification tools like UVM, SystemVerilog, simulation environments, and code coverage analysis is typically required, along with knowledge of industry standards. Strong leadership, project management, effective communication, and team-building abilities help set top candidates apart. These skills and qualities are critical to ensuring thorough verification cycles, timely project delivery, and successful cross-functional team collaboration in complex semiconductor development projects.

What are some of the primary challenges faced by Asic Verification Managers in their daily work?

ASIC Verification Managers often navigate the complexities of verifying highly integrated, feature-rich designs under tight development timelines. They manage large teams of engineers, coordinate cross-functional communication with design, physical implementation, and firmware groups, and are responsible for developing and executing comprehensive verification plans. Balancing resource allocation, ensuring thorough test coverage, and adapting to evolving project requirements are common challenges. Success in this role often depends on strong organizational skills, attention to technical detail, and the ability to anticipate and resolve verification bottlenecks promptly.

What does an Asic Verification Manager do?

An ASIC Verification Manager leads a team responsible for verifying the functionality and performance of ASIC designs before production. They develop verification strategies, oversee testbench creation, and ensure compliance with design specifications. Their role includes managing project timelines, collaborating with design and software teams, and improving verification methodologies. Strong leadership, technical expertise in verification tools, and experience in UVM and SystemVerilog are essential for success in this role.

What are the most commonly searched types of Asic Verification jobs in Seattle, WA?

The most popular types of Asic Verification jobs in Seattle, WA are:

What are popular job titles related to Asic Verification Manager jobs in Seattle, WA?

For Asic Verification Manager jobs in Seattle, WA, the most frequently searched job titles are:

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The top searched job categories for Asic Verification Manager jobs in Seattle, WA are:

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Cities near Seattle, WA with the most Asic Verification Manager job openings:

Asic Verification Manager jobs near you
Infographic showing various Asic Verification Manager job openings in Seattle, WA as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $156,256 per year, or $75.1 per hour.

Principal ASIC Design Verification Engineer

K2 Space

Seattle, WA

$190K - $285K/yr

Full-time

Medical, Dental, Vision, Life, PTO

Re-posted 13 days ago

Job description

The Role 

We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon. 

Responsibilities 

  • Develop and execute verification plans for block-level, subsystem-level, and full-chip environments.
  • Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.
  • Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.
  • Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.
  • Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.
  • Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.
  • Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.
  • Participate in design reviews, microarchitecture discussions, and influence design-for-verification (DFV) best practices.
  • Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers to ensure end-to-end coverage and test.
  • Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis.
  • Participate in ASIC team interviews.
  • Drive advancement of DV methodologies and improvements.
  • Manage external IP providers and verification partners when needed.
  • Take lead on large and/or complex systems. 

Qualifications 

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
  • 10+ years of experience in ASIC/SoC verification.
  • Solid understanding of SystemVerilog, digital logic, RTL design, DFT, and hardware design and verification flows.
  • Proficiency with several simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tools, and scripting languages (ex: Python, Perl, TCL).
  • Experience with test planning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions.
  • Experience with regression management, coverage analysis, revision control (ex: Git), CI/CD automation, and gate-level simulation.
  • Experience with developing and integrating reference models.
  • Experience with embedded processor-based designs and firmware/bare metal coding (ex: C, C++).
  • Understanding of many industry-standard interfaces (ex: APB/AHB/AXI).
  • Involvement in post-silicon validation planning and execution. 

Nice to Have

  • Experience with low power verification.
  • Experience with analog behavioral models.
  • Familiarity with physical design flows.
  • Experience working in cross-functional, geographically distributed teams.
  • Experience in space, telecom, or RF/digital mixed systems is a plus. 

Compensation and Benefits:

  • Base salary range for this role is $190,000 - $285,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks
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About K2 Space

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Los Angeles, CA, US

Year founded

2022

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