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Asic Verification Engineer Remote Jobs in Union, NJ

Build the agent runtime: the loop where it plans, acts, and verifies its own work instead of ... Remote. Work from wherever you're sharpest; we default to async and gather in person a few times a ...

Senior Staff Software Engineer Company NewtonX is the leading AI-powered B2B research company that helps businesses make informed decisions by connecting them with verified subject matter experts. We ...

We are looking for a remote, part-time Flutter developer to start immediately on several projects ... Willing to do identity verification Please apply if: * you have 4+ years of software development ...

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As a Senior Forward Deployed Engineer, you'll embed directly with the world's largest companies and ... you verify their output * You thrive on ownership: you've repeatedly taken loosely defined or ...

This position may be remote, with a preferred location in Illinois, Iowa, Massachusetts, New Jersey ... Conduct measurement and verification activities to establish facility operating conditions, confirm ...

This position may be remote, with a preferred location in Illinois, Iowa, Massachusetts, New Jersey ... Conduct measurement and verification activities to establish facility operating conditions, confirm ...

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Asic Verification Engineer Remote information

See Union, NJ salary details

$89.7K

$159K

$210.9K

How much do asic verification engineer remote jobs pay per year?

As of Jul 27, 2026, the average yearly pay for asic verification engineer remote in Union, NJ is $159,048.00, according to ZipRecruiter salary data. Most workers in this role earn between $138,600.00 and $178,800.00 per year, depending on experience, location, and employer.

What does an ASIC Verification Engineer do?

An ASIC Verification Engineer is responsible for ensuring that an Application-Specific Integrated Circuit (ASIC) design functions as intended before it is manufactured. They develop and implement test plans, create verification environments using hardware description and verification languages like SystemVerilog or UVM, and run simulations to detect design flaws. Working remotely, these engineers collaborate with design teams using digital tools and communication platforms to review specifications, debug issues, and validate functionality. Their work is critical to reducing errors, saving costs, and ensuring high-quality chip production.

What are the main challenges of working remotely as an ASIC Verification Engineer, and how can they be addressed?

One of the main challenges of working remotely as an ASIC Verification Engineer is effective collaboration with design and verification teams, especially when debugging complex issues that benefit from real-time, face-to-face communication. Additionally, accessing hardware labs or simulation environments may require coordination with on-site colleagues. To address these challenges, it’s important to leverage video conferencing, screen sharing, and collaborative project management tools. Proactively communicating your progress and questions, and establishing regular check-ins with your team, can help ensure alignment and maintain productivity in a remote setup.

What is the difference between Asic Verification Engineer Remote vs Asic Design Engineer?

AspectAsic Verification Engineer RemoteAsic Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA/ASIC verification certificationsBachelor's/Master's in Electrical Engineering or Computer Engineering; VLSI design certifications
Work EnvironmentRemote, collaborative teams, virtual toolsTypically in-office or hybrid, design labs, CAD tools
Industry UsageCommon in semiconductor, electronics, and tech companies

While both roles require a strong background in VLSI and digital design, Asic Verification Engineers focus on testing and validating ASIC designs remotely, whereas Asic Design Engineers are involved in creating and designing ASICs, often working on-site. The roles share similar credentials but differ in daily tasks and work environment.

What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer (Remote), and why are they important?

To thrive as an ASIC Verification Engineer (Remote), you need a solid background in digital design, verification methodologies, and hardware description languages such as Verilog or VHDL, often supported by a degree in electrical or computer engineering. Proficiency with simulation tools (e.g., Synopsys VCS, Cadence Xcelium), scripting languages (Python, Perl), and familiarity with UVM or SystemVerilog is typically required. Strong problem-solving skills, effective communication, and the ability to work independently and collaboratively in distributed teams are valuable soft skills. These competencies are crucial for ensuring robust chip validation, efficient remote collaboration, and successful project delivery in complex hardware development environments.
What cities near Union, NJ are hiring for Asic Verification Engineer Remote jobs? Cities near Union, NJ with the most Asic Verification Engineer Remote job openings:
Design Verification Engineer - Fully Remote | Upto $175/hr

Design Verification Engineer - Fully Remote | Upto $175/hr

Mercor

New York, NY • Remote

$175/hr

Full-time

This job post has expired today. Applications are no longer accepted.


Job description

About the job

Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark, General Catalyst, Peter Thiel, Adam D'Angelo, Larry Summers, and Jack Dorsey.

Position: RTL Design Engineers
Type: Contract
Compensation: $100–$175/hour
Location: Remote
Duration: 3+ months
Commitment: 40 hours/week

Role Responsibilities

  • Evaluate digital chip design workflows to enhance AI model training and evaluation.
  • Design and verify RTL components using Verilog/SystemVerilog.
  • Collaborate with architecture, verification, and implementation teams to improve model outputs.
  • Develop reusable verification components and testbench infrastructure.
  • Leverage LLM-based tools to accelerate chip design and verification processes.
  • Work independently and asynchronously to meet project deadlines.

Qualifications

Must-Have

  • 3–10 years of experience in digital RTL design or design verification.
  • Strong proficiency in Verilog/SystemVerilog and UVM.
  • Solid understanding of digital design fundamentals: FSMs, datapaths, pipelines, FIFOs, arbiters, clock/reset domains, bus protocols.
  • Experience with ASIC design flows and common EDA tools.
  • Ability to write clear design documentation and communicate technical tradeoffs.

Preferred

  • Knowledge of AMBA protocols (AXI, AHB, APB).
  • Background in CPU, GPU/ML accelerator, networking, memory subsystem, PCIe/high-speed IO, SoC interconnect, low-power design.
  • Exposure to formal verification or SV/UVM-based design verification.

Start Date

  • Week of 04/23; applications reviewed on a rolling basis.

Compensation & Legal

  • Hourly contractor, Paid weekly.

Application Process (Takes 20–30 mins to complete)

  • Upload resume
  • AI interview based on your resume
  • Submit form

Resources & Support

  • For details about the interview process and platform information, please check: https://talent.docs.mercor.com/welcome
  • For any help or support, reach out to: support@mercor.com

PS: Our team reviews applications daily. Please complete your AI interview and application steps to be considered for this opportunity.