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Asic Software Engineer Jobs (NOW HIRING)

A4G Solutions LLC

ASIC designer

Waukesha, WI · On-site

$40 - $50/hr

Qualifications/Requirements * BS in Electrical Engineering or similar with at least 10 years mixed ... Develop software which meets rigorous quality, reliability, performance, and testability ...

Fintal Partners

Embedded Software Engineer

Chicago, IL · On-site

$135K - $178K/yr

Work at the intersection of software and specialized hardware, including FPGA/ASIC-based systems ... Collaborate closely with hardware engineers, traders, and other engineering teams * Own projects ...

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Inverselogix Inc

Embedded Software Engineer

Rochester, MI · On-site

$121K - $159K/yr

... ASIC peripherals. Strong knowledge of layered software architectures and design of Interface layers Ability to interpret circuit schematics for IO processing and configurations Motor controls ...

Inverselogix Inc

Embedded Software Engineer

Rochester, MI · On-site

$121K - $159K/yr

S. in Electrical Engineering, Computer Science, Computer Engineering or Electronics Engineering ... and ASIC peripherals. • Strong knowledge of layered software architectures and design of ...

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Asic Software Engineer information

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How much do asic software engineer jobs pay per hour?

As of Sep 15, 2026, the average hourly pay for asic software engineer in the United States is $50.69, according to ZipRecruiter salary data. Most workers in this role earn between $39.18 and $61.78 per hour, depending on experience, location, and employer.

What is the difference between Asic Software Engineer vs FPGA Software Engineer?

AspectAsic Software EngineerFPGA Software Engineer
Required CredentialsBachelor's/Master's in Computer Engineering, Electrical Engineering, or related fields; knowledge of hardware description languagesBachelor's/Master's in Electrical Engineering, Computer Engineering, or related fields; experience with FPGA design tools
Work EnvironmentDesigning software for ASIC chips used in consumer electronics, automotive, or telecom industriesDeveloping FPGA-based prototypes for hardware acceleration, testing, and validation
Industry UsageCommonly used in semiconductor companies, integrated circuit design firmsPopular in prototyping, hardware acceleration, and research labs

The main difference between an Asic Software Engineer and an FPGA Software Engineer lies in their focus: Asic Software Engineers develop software for ASIC chips used in mass-produced hardware, while FPGA Software Engineers work on FPGA-based prototypes and hardware acceleration. Both roles require knowledge of hardware description languages and are vital in hardware-software integration, but they serve different stages of product development and deployment.

Are ASIC software engineers in demand?

ASIC software engineers are in high demand due to the growing need for specialized hardware design and verification in industries like semiconductor manufacturing and electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in EDA tools, enhance job prospects in this field.

What does an ASIC Software Engineer do?

An ASIC Software Engineer develops and maintains software tools and firmware used in the design, verification, and testing of application-specific integrated circuits (ASICs). They often work with hardware description languages, simulation tools, and programming languages like C or Python to ensure the ASICs function correctly and meet performance specifications. Strong programming skills and knowledge of digital design are essential in this role.

What are popular job titles related to Asic Software Engineer jobs?

For Asic Software Engineer jobs, the most frequently searched job titles are:

Infographic showing various Asic Software Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 1% As Needed, 86% Full Time, 9% Part Time, and 3% Contract. Highlights an 85% Physical, 3% Hybrid, and 12% Remote job distribution, with an average salary of $105,435 per year, or $50.7 per hour.

ASIC Engineer, Performance Architecture and Modeling

Austin, TX • On-site

Meta
Internet and IT • 10K+ employees
Learn more about Metaexternal

$146K/yr

Full-time

Re-posted 27 days ago

Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

Job description

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing in architecture, performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs designed for Meta's infrastructure. In this role, you will establish functional and performance modeling methodologies and long-term silicon roadmap strategy, as well as develop and analyze workloads, partnering with architecture, design, and software teams to ensure Meta's infrastructure silicon meets the demanding throughput, latency, and efficiency targets required at hyperscale.
ASIC Engineer, Performance Architecture and Modeling Responsibilities:
  • Drive microarchitectural exploration and trade-off analysis across compute, memory subsystem, interconnect, and I/O domains to inform silicon architecture decisions
  • Define and own the performance modeling strategy for custom infrastructure ASICs, including development of cycle-accurate and transaction-level simulation environments
  • Develop and maintain C++ models of AI chip IPs and subsystems for architecture exploration, performance analysis, and software development
  • Develop low-level workloads and kernels for machine learning training and inference applications
  • Establish performance analysis methodologies, benchmarking frameworks, and bottleneck identification techniques across the full ASIC pipeline
  • Collaborate with architecture, RTL design, and physical design teams to translate performance requirements into implementable microarchitectural specifications
  • Partner with software and systems teams to co-optimize workload scheduling, firmware, and driver behavior against silicon performance characteristics
  • Lead cross-functional technical reviews and communicate performance modeling results and architectural recommendations to engineering leadership
  • Define long-term performance modeling infrastructure roadmaps, including tooling, automation, and simulation platform investments
  • Mentor other engineers on performance modeling techniques, simulation methodology, and microarchitectural analysis best practices
  • Identify and resolve performance gaps between modeled and measured silicon behavior through structured root-cause analysis and model calibration

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of experience in ASIC design, silicon engineering, or a related technical field
  • Proficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis tools
  • 5+ years of experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs
  • Experience with performance analysis of data center, AI accelerator, or high-performance computing workloads on custom silicon
  • Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC for complex digital systems including processors, memory subsystems, or high-speed interconnects
  • Experience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teams
  • Experience with assembly programming languages, and compiler technologies

Preferred Qualifications:
  • Experience with AI numerics, data types, math functions, and precision/accuracy analysis
  • Experience writing and optimizing compute/collective kernels in CUDA or equivalent GPU programming frameworks
  • Experience building or scaling performance modeling infrastructure for hyperscale data center ASICs, including network, storage, or AI inference accelerator designs
  • Experience developing Python-based automation pipelines for simulation orchestration, regression testing, and performance data analysis
  • Familiarity with post-silicon performance validation and model-to-hardware correlation methodologies
  • Experience with hardware description languages (e.g., SystemVerilog, VHDL) and simulation environments used in ASIC development flows
  • Experience with high-level synthesis, power-performance-area trade-off analysis, or PPA-driven microarchitectural optimization

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$146,000/year to $209,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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