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Asic Hardware Intern Jobs (NOW HIRING)

DFT Intern

San Jose, CA ยท On-site

$17.50 - $23.50/hr

Job Summary As a DFT Intern at Etched, you will help review and refine DFT flow automation to ... Familiarity with a hardware description language (Verilog or SystemVerilog) * Exposure to ASIC or ...

DFT Intern

San Jose, CA ยท On-site

$17.50 - $23.50/hr

Job Summary As a DFT Intern at Etched, you will help review and refine DFT flow automation to ... Familiarity with a hardware description language (Verilog or SystemVerilog) * Exposure to ASIC or ...

Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the ... Partner with PCB layout, package, hardware, and ASIC teams to improve signal integrity. Identify ...

Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the ... Partner with PCB layout, package, hardware, and ASIC teams to improve signal integrity. Identify ...

DV Intern

San Jose, CA ยท On-site

About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks ... Exposure to ASIC or SoC design concepts * Familiarity with SystemVerilog, UVM, or Python

DV Intern

San Jose, CA ยท On-site

About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks ... Exposure to ASIC or SoC design concepts * Familiarity with SystemVerilog, UVM, or Python

Microprocessor/ASIC Design Skills: VHDL, Verilog, RTL, SPICE, TCL, UVM, verification, and testing ... Job Title Hardware Developer Intern 2027 -Houston, TX Date posted 01-Sep-2026 Job ID 131087 City ...

Microprocessor/ASIC Design Skills: VHDL, Verilog, RTL, SPICE, TCL, UVM, verification, and testing ... Job Title Supply Chain Hardware Developer Intern 2027 Date posted 01-Sep-2026 Job ID 131135 City ...

2027 PhD Research Engineering Intern/Co-op

San Jose, CA ยท On-site

$19.75 - $25.50/hr

As an AMD intern and co-op, you'll be placed at the epicenter of the AI ecosystem, working ... hardware/software co-design, machine learning) * FPGA or ASIC-based RTL design and verification ...

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Asic Hardware Intern information

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How much do asic hardware intern jobs pay per hour?

As of Sep 10, 2026, the average hourly pay for asic hardware intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

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Infographic showing various Asic Hardware Intern job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 5% Part Time, and 5% Contract. Highlights an 92% Physical, 3% Hybrid, and 5% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.

DFT Intern

San Jose, CA โ€ข On-site

$17.50 - $23.50/hr

Internship

Re-posted 2 hours ago


Job description

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams, contribute to DFT verification (including MBIST, Scan, BSCAN, and SSN simulations), and develop flows for various ATPG fault models. You do not necessarily need prior DFT experience; just the ability to learn quickly in a fast-paced, high-autonomy environment. We are looking for Summer '26, Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
  • Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
  • Familiarity with a hardware description language (Verilog or SystemVerilog)
  • Exposure to ASIC or SoC design concepts
  • Familiarity with digital logic design fundamentals
  • Familiarity with standard ASIC design flow steps (synthesis, STA, DFT)
  • Familiarity with scripting in Python, Tcl, or another language
  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Strong candidates may also have experience with
  • Knowledge of DFT concepts such as MBIST, scan insertion, and scan compression
  • Experience with Tessent or similar DFT tooling
  • Familiarity with ATPG fault models (SAF, TDF, BDF, IDDQ, PDF)
  • Exposure to DFT flow automation or regression infrastructure
  • Familiarity with clocking and reset schemes

We encourage you to apply even if you do not believe you meet every single qualification.
Program details
  • 12-week paid internship
  • Generous housing support for those relocating
  • Daily lunch and dinner in our office
  • Based at our office in San Jose, CA
  • Direct mentorship from industry leaders and world-class engineers
  • Opportunity to work on one of the most important problems of our time

For any questions, contact internships@etched.com.
How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.