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Asic Engineering Jobs in Warren, NJ (NOW HIRING)

ASIC Engineer

New York, NY · On-site

$181K/yr

About the Position We are looking to hire an experienced ASIC Engineer to help us design, test and ... Interested in using software engineering techniques to improve the hardware design process, and ...

ASIC Engineer

New York, NY · On-site

$181K/yr

About the Position We are looking to hire an experienced ASIC Engineer to help us design, test and ... Interested in using software engineering techniques to improve the hardware design process, and ...

... our FPGA or ASIC-based applications. We're big believers in the ability of tools to make ... We apply these same principles to our hardware engineering work, and we're looking for people who ...

... our FPGA or ASIC-based applications. We're big believers in the ability of tools to make ... We apply these same principles to our hardware engineering work, and we're looking for people who ...

We apply these same principles to our hardware engineering work, and we're looking for people who ... The hardware team at Jane Street works on both FPGA and ASIC designs. Depending on your background ...

We are seeking a hardworking and experienced ASIC Link Modeling Engineer to join our team and be a collaborative modeler for Cisco's silicon photonics systems for next generation products for 100/200 ...

THW Client Co-op

New York, NY · On-site

$27 - $37.50/hr

As a successful candidate, you will be working within the ASIC IP team with other design and verification engineers, performing digital ASIC design and verification of the Client sub-systems and ...

ASIC Physical Design Engineer

New York, NY · On-site

$148K - $153K/yr

About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test ... to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development ...

ASIC Physical Design Engineer

New York, NY · On-site

$148K - $153K/yr

About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test ... to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development ...

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Showing results 1-20

Asic Engineering information

See Warren, NJ salary details

$85.7K

$164.3K

$173.9K

How much do asic engineering jobs pay per year?

As of Aug 8, 2026, the average yearly pay for asic engineering in Warren, NJ is $164,337.00, according to ZipRecruiter salary data. Most workers in this role earn between $172,400.00 and $172,400.00 per year, depending on experience, location, and employer.

What is the difference between Asic Engineering vs FPGA Design?

AspectAsic EngineeringFPGA Design
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; often certifications in ASIC designBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; certifications less common
Work EnvironmentDesigning custom chips in semiconductor labs or design houses; involves hardware and software integrationDeveloping programmable logic designs in labs or FPGA development environments; focuses on reconfigurable hardware
Industry UsageUsed in high-volume consumer electronics, telecom, and automotive industries for custom chip solutionsCommon in prototyping, testing, and specialized applications across various industries

Asic Engineering and FPGA Design share foundational knowledge in digital logic and hardware description languages. However, Asic Engineers focus on designing permanent, high-volume chips, while FPGA Designers work with reconfigurable hardware for testing and specialized tasks. Both roles require similar educational backgrounds but differ in application and design processes.

ASIC Engineer

Jane Street

New York, NY • On-site

$181K/yr

Full-time

Re-posted 11 days ago


Job description

About the Position

We are looking to hire an experienced ASIC Engineer to help us design, test and deploy advanced hardware designs. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking and research infrastructure. We are looking for someone who can contribute to all of our projects and be happy to work on both FPGA-based and ASIC-based technologies.

We're big believers in the ability of tools to improve the productivity, reliability and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.

About You
  • Have 4+ years practical experience in RTL design and verification
  • Experienced in ASIC design using either Synopsys or Cadence flows, including at least one of the following:
    • Front-end RTL design and synthesis
    • Back-end physical design
    • Verification (including formal)
  • Interested in using software engineering techniques to improve the hardware design process, and experience programming in some high-level languages (Python, C++, Java, Haskell, etc.)

If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.