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Asic Design Engineer Jobs in Allen, TX (NOW HIRING)

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

Senior FPGA Design Engineer

Dallas, TX

$121K - $167K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

... Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

... Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

Typically requires a Bachelor of Science degree in a STEM field (Science, Technology, Engineering, Mathematics). * 5+ years experience in FPGA/ASIC design, RTL development, and verification

Typically requires a Bachelor of Science degree in a STEM field (Science, Technology, Engineering, Mathematics). * 5+ years experience in FPGA/ASIC design, RTL development, and verification

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

and other details - We are seeking an ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

FPGA ENGINEER II

Mckinney, TX · On-site

$114K - $157K/yr

We are currently seeking an FPGA Engineer II to join our team. This position is an onsite role ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)

FPGA ENGINEER II

Mckinney, TX

$114K - $157K/yr

We are currently seeking an FPGA Engineer II to join our team. This position is an onsite role ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)

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Asic Design Engineer information

See Allen, TX salary details

$87.4K

$139.7K

$187.9K

How much do asic design engineer jobs pay per year?

As of Aug 2, 2026, the average yearly pay for asic design engineer in Allen, TX is $139,708.00, according to ZipRecruiter salary data. Most workers in this role earn between $122,300.00 and $167,400.00 per year, depending on experience, location, and employer.

What is the difference between Asic Design Engineer vs FPGA Design Engineer?

AspectAsic Design EngineerFPGA Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning custom chips for manufacturingDeveloping programmable logic designs for prototyping and deployment
Industry UsageSemiconductor companies, consumer electronics, automotivePrototyping, testing, and specialized hardware applications

Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.

How much does an ASIC design engineer make?

The average salary for an ASIC design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $180,000. Compensation may also include bonuses and stock options in some organizations.

What are some common challenges faced by ASIC Design Engineers during the design and verification phases?

ASIC Design Engineers often encounter challenges such as meeting strict performance and power constraints while ensuring that the design remains within budget and time limits. Debugging complex logic errors during simulation and verification can be particularly demanding, as small mistakes can have significant downstream effects. Additionally, effective communication with cross-functional teams—including software, hardware, and validation engineers—is essential to resolve integration issues and meet project milestones. Adapting to rapidly evolving tools and technologies is also a key part of the role.

Are ASIC design engineers in demand?

ASIC design engineers are in high demand due to the growth of semiconductor technology, consumer electronics, and data centers. They require skills in hardware description languages like VHDL or Verilog and familiarity with EDA tools, making their expertise valuable in industries focused on custom chip development.

What engineer makes $500,000 a year?

An experienced senior ASIC design engineer or hardware engineer working in high-paying industries such as semiconductor or technology companies can earn $500,000 or more annually, especially with bonuses and stock options. These roles typically require advanced skills in digital design, verification, and familiarity with tools like VHDL or Verilog, along with extensive industry experience. Compensation varies based on location, company size, and individual expertise.

What are the key skills and qualifications needed to thrive as an ASIC Design Engineer, and why are they important?

To thrive as an ASIC Design Engineer, you need a solid background in electrical engineering, digital logic design, and proficiency with hardware description languages like Verilog or VHDL, usually backed by a relevant degree. Familiarity with EDA tools such as Synopsys or Cadence and knowledge of simulation and verification methodologies are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork set outstanding engineers apart in this role. These skills and qualities are vital for delivering complex, high-performance integrated circuits that meet strict specifications and project deadlines.

What are ASIC Design Engineers?

ASIC Design Engineers are professionals who design and develop Application-Specific Integrated Circuits (ASICs), which are custom-built semiconductor chips tailored for specific applications or products. They are responsible for the entire design process, including architecture definition, logic design, verification, synthesis, and sometimes physical layout. Their work is crucial in industries like consumer electronics, telecommunications, automotive, and more, ensuring that devices have optimized performance, power efficiency, and functionality for their intended uses.

What Does an ASIC Design Engineer Do?

An application specific integrated circuit (ASIC) is an electronic circuit created for a specific purpose, rather than for general use. ASIC design engineers create product design specification (PDS) statements for ASIC, optimize logic design, and create architectural design models. ASIC design engineers often work on a team to deliver ASIC design solutions for standard and complex computing. Knowledge of computer-aided design (CAD) tools, logic simulation, Verilog, and other hardware description languages (HDLs) is integral to career success.

What is the salary of ASIC design engineer?

The salary of an ASIC design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools tend to earn higher salaries.
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Infographic showing various Asic Design Engineer job openings in Allen, TX as of July 2026, with employment types broken down into 20% As Needed, 74% Full Time, 3% Part Time, 2% Contract, and 1% Summer. Highlights an 86% Physical, 8% Hybrid, and 6% Remote job distribution, with an average salary of $139,708 per year, or $67.2 per hour.

Senior ASIC Design Engineer

Cornelis Networks

Dallas, TX • On-site, Remote

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 25 days ago


Job description

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.


Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world's most demanding computational challenges with our next-generation networking solutions.

We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.


Cornelis Networks is seeking talented Senior ASIC Design Engineers with deep expertise in one or more of the critical areas needed to develop world-class SoCs for deployment in high-performance computing, advanced data analytics, and AI interconnect solutions. Ideal candidates will have relevant experience in the networking domain, with proven expertise in 50G, 100G, and 400G Ethernet protocols-including TCP/IP, RDMA/RoCE, and IPSec-and their application in high-speed data processing and networking environments.


Key Responsibilities:

  • Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic.
  • Collaborate with verification engineers to create block- and system-level test plans to ensure comprehensive design coverage.
  • Define timing constraints for RTL blocks and work with Physical Design engineers to optimize timing closure.
  • Support post-silicon validation, collaborating with hardware, firmware, and software teams to debug and resolve ASIC issues.
  • Contribute to performance optimization and power-aware design strategies for Host Fabric Interface subsystems.


MinimumQualifications:

  • B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or related field.
  • 8+ years of post-college experience in digital design with proficiency in Verilog and System Verilog.
  • Experience in RTL design for high-speed data paths or packet processing in ASICs.
  • Deep understanding of Host Ethernet adaptor architectures.
  • Familiarity with timing closure and modern physical design methodologies.
  • Proven ability in system-level debug and root cause analysis of technical issues.
  • Strong verbal and written communication skills.


Preferred Qualifications:

  • Knowledge of Ethernet architecture and networking protocols.
  • Prior experience with RTL development for Ethernet host adapters and system debug.
  • Expertise in multiple clock domain designs and asynchronous interfaces.
  • 5+ years of experience with scripting languages such as TCL, Python, or Perl.
  • Familiarity with EDA tools like Design Compiler, Spyglass, or PrimeTime.


Location: This is a remote position for employees residing within the United States.


We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.

At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.

In addition to your base pay, you'll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.

Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.