ZipRecruiter

Log In

1

Asic Architect Jobs (NOW HIRING)

Apple

Analog Architect

Austin, TX · On-site

An analog ASIC architect is a key engineer responsible for analyzing the application and coming up with the best analog front end (AFE) architecture for touch and other sensing ASICs. These designs ...

Apple

Analog Architect

Austin, TX · On-site

An analog ASIC architect is a key engineer responsible for analyzing the application and coming up with the best analog front end (AFE) architecture for touch and other sensing ASICs. These designs ...

Jobsbridge

ASIC Engineer

San Jose, CA

$194K/yr

ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal (Cadence Tool for formal verification) Description: Should have 2-5 years of experience in FPGA/ASIC ...

Marvell

ASIC Security Architect

Santa Clara, CA

$76.25 - $98.75/hr

The ASIC Security Architect serves as a senior technical leader within the company, guiding the evolution of capabilities across our leadingedge SoCs and driving innovation to sustain the company ...

Trinity Technology Solutions

ASIC Engineer

San Jose, CA · On-site

$194K/yr

Lead ASIC/SoC architecture and micro-architecture development from concept through production * Collaborate closely with customers to refine requirements and ensure successful delivery * Drive design ...

next page

Showing results 1-20

All JobsAsic Architect Jobs

Asic Architect information

See salary details

$131K

$168.6K

$197K

How much do asic architect jobs pay per year?

As of Jun 9, 2026, the average yearly pay for asic architect in the United States is $168,571.00, according to ZipRecruiter salary data. Most workers in this role earn between $155,000.00 and $183,000.00 per year, depending on experience, location, and employer.

What are ASIC Architects?

ASIC Architects are specialized engineers who design and oversee the development of Application-Specific Integrated Circuits (ASICs). They are responsible for defining the architecture, functionality, and performance requirements of custom chips used in various electronic devices. ASIC Architects collaborate with hardware and software teams to ensure the chip meets the desired specifications, optimizes performance, and stays within power and cost constraints. Their expertise is essential in industries like telecommunications, automotive, and consumer electronics, where tailored hardware solutions are critical.

What are the key skills and qualifications needed to thrive as an ASIC Architect, and why are they important?

To thrive as an ASIC Architect, you need deep expertise in digital and analog circuit design, computer architecture, and semiconductor technology, typically supported by a degree in electrical engineering or a related field. Proficiency with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and familiarity with ASIC development flows is essential. Strong problem-solving, communication, and project management skills help you collaborate effectively and drive complex projects to completion. These skills ensure the successful design, verification, and delivery of advanced integrated circuits that meet performance, power, and cost requirements.

What is the difference between Asic Architect vs FPGA Designer?

AspectAsic ArchitectFPGA Designer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI Design, or related fields; certifications like IEEE or industry-specific coursesBachelor's or Master's in Electrical Engineering, VLSI Design, or related fields; similar certifications
Work EnvironmentDesigning custom integrated circuits for manufacturing; often in semiconductor companies or design firmsDeveloping programmable logic designs for specific applications; used in prototyping and flexible hardware solutions
Industry UsagePrimarily in semiconductor manufacturing, consumer electronics, and high-performance computingIn telecommunications, aerospace, and prototyping sectors

While both roles involve VLSI design and hardware development, Asic Architects focus on designing custom chips for mass production, whereas FPGA Designers work on flexible, programmable hardware solutions. The roles share similar credentials and work environments but differ in application and end-use.

What are some common challenges faced by ASIC Architects during the design phase, and how are they typically addressed?

ASIC Architects often encounter challenges such as balancing performance, power consumption, and chip area within strict project timelines. They must also ensure design compliance with specifications while coordinating with verification, physical design, and software teams. Effective communication, early identification of design bottlenecks, and iterative simulation are crucial strategies for addressing these challenges. Collaboration and regular design reviews help ensure that potential issues are resolved early, reducing costly redesigns later in the project.
More about Asic Architect jobs
What cities are hiring for Asic Architect jobs? Cities with the most Asic Architect job openings:
What states have the most Asic Architect jobs? States with the most job openings for Asic Architect jobs include:
What job categories do people searching Asic Architect jobs look for? The top searched job categories for Asic Architect jobs are:
Asic Architect jobs near you
Infographic showing various Asic Architect job openings in the United States as of May 2026, with employment types broken down into 80% Full Time, and 20% Part Time. Highlights an 86% Physical, 9% Hybrid, and 5% Remote job distribution, with an average salary of $168,571 per year, or $81 per hour.
Senior ASIC Design Engineer with Security Clearance

Senior ASIC Design Engineer with Security Clearance

Zachary Piper Solutions, LLC

Saratoga, CA

$250K - $290K/yr

Other

Medical, Dental, Vision, Retirement, PTO

Posted 12 days ago

Job description

Piper Companies is looking for a Senior ASIC Design Engineer to join a cutting-edge AI networking company onsite in Saratoga, CA Monday - Friday , to help define and build the next generation of high-performance networking ASICs. The ideal Senior ASIC Design Engineer will bridge the gap between high-level system design and ASIC implementation to help shape the future of data communication. Responsibilities for the Senior ASIC Design Engineer: * Work with the CTO and engineering teams to translate system-level requirements into detailed ASIC architecture.

* Lead architectural modeling and analysis to ensure optimal throughput, latency, and power efficiency. * Collaborate with RTL, Verification, Physical Design, and Firmware teams to ensure seamless implementation. * Drive integration of high-speed I/O and third-party IPs into the ASIC design.

Qualifications for Senior ASIC Design Engineer: * 10+ years of experience as an Chip Architect, preferably in networking or high-performance computing (Routers, Switches, GPU, CPU, Data Center, etc) * Must be eligible to work in the United States and obtain and maintain an Active U.S. Government Secret Clearance. * Deep understanding of networking protocols (Ethernet, TCP/IP, VLAN, MPLS, RoCE) and their hardware implications.

* Proven experience in architecture design, performance modeling, and architectural trade-offs. * Familiarity with high-speed I/O (PCIe Gen5/Gen6, SerDes) and software control plane interfaces. * Experience across the full ASIC development lifecycle-from concept to silicon validation.

* Master's degree in Electrical Engineering or related field required. Compensation/Benefits for the Senior ASIC Design Engineer: * Salary Range: $250,000 - $290,000 annually (based on experience and qualifications) * Comprehensive Benefits: Medical, Dental, Vision, 401K, PTO, Sick Leave (if required by law), and Holidays This job opens for applications on 6/5/2026. Applications for this job will be accepted for at least 30 days from the posting date.

Keywords: ASIC, ASIC Architect, Networking ASIC, AI Networking, Design, Microarchitecture, Performance Modeling, PCIe, SerDes, Ethernet, TCP/IP, RoCE, High-Speed Datapath, Silicon Validation, System-on-Chip, SoC Architecture, Hardware Design, IP Integration, Physical Design, Firmware Interface, Chip Architect, DPU, CPU, SOC #LI-BR1 #LI-ON SITE

Apply