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Analog Mixed Signal Cad Engineer Jobs (NOW HIRING)

High-Speed Analog EDA/CAD Engineer: Brief Description: Full-time position. Infinera is seeking an ... The engineer must be an expert in analog and mixed-signal circuit design flows and tools. Tasks ...

Senior Analog EDA/CAD ASIC Engineer

Sunnyvale, CA ยท On-site

$237K/yr

High-Speed Analog EDA/CAD Engineer: Brief Description: Full-time position. Infinera is seeking an ... The engineer must be an expert in analog and mixed-signal circuit design flows and tools. Tasks ...

Principal Engineer, CAD

Tempe, AZ ยท On-site

$160K - $230K/yr

Job Summary The Principal Engineer, CAD will provide CAD Software support for Digital, Analog and Mixed-Signal designs, using Cadence, Synopsys, Siemens, Keysight & 3rd party vendor tools.

Senior Staff CAD Engineer

San Jose, CA ยท On-site

$65 - $75/hr

Senior Staff CAD Engineer Position Description : Protingent Staffing has an exciting contract ... Analog/Mixed-Signal Flow Development: Establish, optimize, and support the Cadence Design Systems ...

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How much do analog mixed signal cad engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for analog mixed signal cad engineer in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

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For Analog Mixed Signal Cad Engineer jobs, the most frequently searched job titles are:

Infographic showing various Analog Mixed Signal Cad Engineer job openings in the United States as of June 2026, with employment types broken down into 62% Full Time, 11% Part Time, and 27% Contract. Highlights an 90% Physical, 4% Hybrid, and 6% Remote job distribution, with an average salary of $186,238 per year, or $89.5 per hour.

EDA/CAD Engineer (Analog & Mixed Signal)

Sunnyvale, CA โ€ข On-site

Trail Blazer Consulting LLC
IT Servicesย โ€ขย 51 - 200 employees

$240K/yr

Other

Posted 24 days ago


Job description

EDA/CAD Engineer (Analog & Mixed Signal)

Sunnyvale, CA โ€“ Hybrid 3 days onsite (relocation candidates is fine)

12 Months

2 video calls

Job Description:

Seeking an EDA/CAD Engineer to support and develop SiGe and CMOS design solutions for the high speed analog ASIC design team. The engineer will be hands-on with all phases of tool flow including PDK installation and support, tool support and installation, layout support, design support including schematic and simulation, design archive and tapeout.

The engineer must be an expert in analog and mixed-signal circuit design flows and tools. Tasks will include significant tool and PDK customization including SKILL and PCELL coding as well as design team support. The self-motivated engineer must be able to anticipate problems and devise effective solutions.

Responsibilities:

โ€ข Install, customize and support external vendor PDK''s for both SiGe and CMOS processes

โ€ข Install, customize and support Custom IC and RF CAD tools for the design of high-speed (10โ€“40 Gb/s), broad-band, mixed-signal, integrated circuits for fiber-based wireline applications.

โ€ข Execute and support layout efforts including DRC/LVS user support and archive and tapeout processes

Minimum Expertise Requirements:

โ€ข Expert in high-speed analog and mixed-signal IC design concepts and must demonstrate superior critical thinking skills, problem solving capabilities and engineering judgment.

โ€ข Fluent with analog EDA front and back-end tools

โ€ข Cadence Virtuoso, ADE

โ€ข Strong SKILL programming a MUST

โ€ข Mentor Calibre (end user support and rule deck writing)

โ€ข Detailed understanding of advanced high-speed analog & mixed-signal layout concepts

โ€ข FlexLM license management

โ€ข Strong UNIX/Linux knowledge

โ€ข Not required but preferred

โ€ข Ocean scripting and advanced modelling and simulation knowledge

โ€ข Linux OS support

Minimum Experience Requirements:

โ€ข 5 years of experience working as a high-speed analog & mixed signal IC CAD professional is required

โ€ข IC Technologies: High-speed IC technologies, including CMOS and bipolar.

โ€ข IC Design Software:

โ€ข Experience with configuring, documenting, and maintaining high speed analog IC design flows is a must.

โ€ข Experience with transistor-level IC design and verification software, e.g. Cadence Composer, Cadence Virtuoso, Cadence Spectre, Virtuoso AMS, Mentor Calibre, Skill language, is a must.

โ€ข General understanding of digital physical design flows, e.g. RTL coding, place and route, DRC/LVS verification.

โ€ข Work Environment: Comfortable working in a fast-paced environment. Must be strong individual contributor, and also able to work as member of a small team. Must be able to support EPDA users and solve problems efficiently, effectively and rapidly.