Active Secret clearance or higher This effort is on-Site Employment type: Full Time - Direct ... Develop and verify VHDL FPGA designs for Xilinx, Altera, and Microsemi devices * Support high-speed ...
Active Secret clearance or higher This effort is on-Site Employment type: Full Time - Direct ... Develop and verify VHDL FPGA designs for Xilinx, Altera, and Microsemi devices * Support high-speed ...
Active Secret clearance or higher This effort is on-Site Employment type: Full Time - Direct ... Develop and verify VHDL FPGA designs for Xilinx, Altera, and Microsemi devices * Support high-speed ...
Active Secret clearance or higher This effort is on-Site Employment type: Full Time - Direct ... Develop and verify VHDL FPGA designs for Xilinx, Altera, and Microsemi devices * Support high-speed ...
FGPA Engineer job opportunity at Tucson, AZ
Tucson, AZ · On-site
$88/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... Designs are verified against requirements using both directed test and constrained random ...
Quick apply
FGPA Engineer job opportunity at Tucson, AZ
Tucson, AZ · On-site
$88/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... Designs are verified against requirements using both directed test and constrained random ...
FPGA Engineer (DOD cleared)
Tucson, AZ · On-site
$122K - $157K/yr
Active Secret clearance or higher This effort is on-Site Employment type: Full Time - Direct ... Support Xilinx, Altera, and Microsemi device families * Design for high-speed serial, RF/EO DSP ...
FPGA Engineer (DOD cleared)
Tucson, AZ · On-site
$122K - $157K/yr
Active Secret clearance or higher This effort is on-Site Employment type: Full Time - Direct ... Support Xilinx, Altera, and Microsemi device families * Design for high-speed serial, RF/EO DSP ...
FPGA Embedded Engineer with Security Clearance
Tucson, AZ · On-site
$116K - $149K/yr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL Applications: gigabit serial ... both directed test and constrained random methodologies. Design support is expected from ...
FPGA Embedded Engineer with Security Clearance
Tucson, AZ · On-site
$116K - $149K/yr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL Applications: gigabit serial ... both directed test and constrained random methodologies. Design support is expected from ...
Xilinx, Altera, Lattice, and Microsemi. Designs are implemented using VHDL for the following ... Designs are verified against requirements using both directed test and constrained random ...
Xilinx, Altera, Lattice, and Microsemi. Designs are implemented using VHDL for the following ... Designs are verified against requirements using both directed test and constrained random ...
Xilinx, Altera, Lattice, and Microsemi. Designs are implemented using VHDL for the following ... Designs are verified against requirements using both directed test and constrained random ...
Xilinx, Altera, Lattice, and Microsemi. Designs are implemented using VHDL for the following ... Designs are verified against requirements using both directed test and constrained random ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$115K - $159K/yr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL Applications: gigabit serial ... both directed test and constrained random methodologies. Design support is expected from ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$115K - $159K/yr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL Applications: gigabit serial ... both directed test and constrained random methodologies. Design support is expected from ...
FPGA Engineer
Tucson, AZ · On-site
$122K - $157K/yr
Xilinx, Altera,and Microsemi. Designs are implemented using VHDL Applications: gigabit serial ... Designs are verified against requirements using both directed test and constrained random ...
FPGA Engineer
Tucson, AZ · On-site
$122K - $157K/yr
Xilinx, Altera,and Microsemi. Designs are implemented using VHDL Applications: gigabit serial ... Designs are verified against requirements using both directed test and constrained random ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$114K - $157K/yr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL Applications: gigabit serial ... both directed test and constrained random methodologies. Design support is expected from ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$114K - $157K/yr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL Applications: gigabit serial ... both directed test and constrained random methodologies. Design support is expected from ...
FPGA Engineer - P2 with Security Clearance
Tucson, AZ · On-site
$81 - $90/hr
Xilinx, Altera, and Microsemi. * Designs are implemented using VHDL for the following applications ... Designs are verified against requirements using both directed test and constrained random ...
FPGA Engineer - P2 with Security Clearance
Tucson, AZ · On-site
$81 - $90/hr
Xilinx, Altera, and Microsemi. * Designs are implemented using VHDL for the following applications ... Designs are verified against requirements using both directed test and constrained random ...
FPGA Engineer job opportunity at Tucson, AZ
Tucson, AZ · On-site
$100.50/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... directed and constrained random tests, while tracking functional and code coverage Help drive ...
Quick apply
FPGA Engineer job opportunity at Tucson, AZ
Tucson, AZ · On-site
$100.50/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... directed and constrained random tests, while tracking functional and code coverage Help drive ...
FPGA Engineer job opportunity at Tucson, AZ
Tucson, AZ · On-site
$116/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... directed and constrained random tests, while tracking functional and code coverage Help drive ...
FPGA Engineer job opportunity at Tucson, AZ
Tucson, AZ · On-site
$116/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... directed and constrained random tests, while tracking functional and code coverage Help drive ...
FPGA Engineer job opportunity at Tucson, AZ
Tucson, AZ · On-site
$116/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... directed and constrained random tests, while tracking functional and code coverage Help drive ...
Quick apply
FPGA Engineer job opportunity at Tucson, AZ
Tucson, AZ · On-site
$116/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... directed and constrained random tests, while tracking functional and code coverage Help drive ...
FPGA Engineer - P3 with Security Clearance
Tucson, AZ · On-site
$92 - $103/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... Verify designs utilizing self-checking techniques with directed and constrained random tests, while ...
FPGA Engineer - P3 with Security Clearance
Tucson, AZ · On-site
$92 - $103/hr
Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications ... Verify designs utilizing self-checking techniques with directed and constrained random tests, while ...
FPGA Engineer - P4 with Security Clearance
Tucson, AZ · On-site
$106 - $119/hr
Xilinx, Altera and Microsemi. Designs are implemented using VHDL for the following applications ... Verify designs utilizing self-checking techniques with directed and constrained random tests, while ...
FPGA Engineer - P4 with Security Clearance
Tucson, AZ · On-site
$106 - $119/hr
Xilinx, Altera and Microsemi. Designs are implemented using VHDL for the following applications ... Verify designs utilizing self-checking techniques with directed and constrained random tests, while ...
FPGA Engineer
Tucson, AZ · On-site
$125K - $161K/yr
Xilinx, Altera,and Microsemi. Designs are implemented using VHDL for the following applications ... directed and constrained random tests, while tracking functional and code coverage Help drive ...
FPGA Engineer
Tucson, AZ · On-site
$125K - $161K/yr
Xilinx, Altera,and Microsemi. Designs are implemented using VHDL for the following applications ... directed and constrained random tests, while tracking functional and code coverage Help drive ...
Lead, Digital Design Engineer
Tempe, AZ · On-site
$132K/yr
Developing FPGA VHDL code for Microchip/Xilinx (AMD)/Altera (Intel)/Other platforms * Developing ... Direct experience interfacing with microcontrollers and/or knowledge of embedded processor ...
Lead, Digital Design Engineer
Tempe, AZ · On-site
$132K/yr
Developing FPGA VHDL code for Microchip/Xilinx (AMD)/Altera (Intel)/Other platforms * Developing ... Direct experience interfacing with microcontrollers and/or knowledge of embedded processor ...
FPGA Engineer
Tucson, AZ · On-site
$122K - $157K/yr
... Altera, and Microsemi . FPGA designs are implemented primarily using VHDL for applications ... Develop and execute directed and constrained-random verification tests. * Implement self-checking ...
FPGA Engineer
Tucson, AZ · On-site
$122K - $157K/yr
... Altera, and Microsemi . FPGA designs are implemented primarily using VHDL for applications ... Develop and execute directed and constrained-random verification tests. * Implement self-checking ...
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Director, Platforms FLSA Status: Exempt Last Modified: 9/10/2025 Level : T3 Location Chandler, AZ ... Strong FPGA Implementation with Altera Quartus or Xilinx Vivado * Experience designing/debugging ...
Quick apply
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Director, Platforms FLSA Status: Exempt Last Modified: 9/10/2025 Level : T3 Location Chandler, AZ ... Strong FPGA Implementation with Altera Quartus or Xilinx Vivado * Experience designing/debugging ...
Altera Director information
What is the difference between Altera Director vs FPGA Design Manager?
| Aspect | Altera Director | FPGA Design Manager |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field; often requires leadership experience | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field; experience in FPGA design |
| Work Environment | Leadership role overseeing multiple teams or projects within FPGA/ASIC development | Hands-on FPGA design and team management within engineering teams |
| Employer & Industry Usage | Used in semiconductor companies, tech firms, and FPGA solution providers | Common in FPGA design firms, semiconductor companies, and R&D departments |
The Altera Director typically holds a leadership position overseeing FPGA or semiconductor projects, focusing on strategic management and team coordination. In contrast, an FPGA Design Manager is more involved in the technical aspects of FPGA development while managing a team of engineers. Both roles require technical expertise, but the Director emphasizes strategic oversight, whereas the Manager focuses on design execution.
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Re-posted 8 days ago
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