Utilization of AI tools to accelerate troubleshooting and monitoring of design flows A day in the ... chip design engineers more efficient through seamless tool flows that power millions of Amazon ...
Utilization of AI tools to accelerate troubleshooting and monitoring of design flows A day in the ... chip design engineers more efficient through seamless tool flows that power millions of Amazon ...
Utilization of AI tools to accelerate troubleshooting and monitoring of design flows A day in the ... chip design engineers more efficient through seamless tool flows that power millions of Amazon ...
Utilization of AI tools to accelerate troubleshooting and monitoring of design flows A day in the ... chip design engineers more efficient through seamless tool flows that power millions of Amazon ...
Utilization of AI tools to accelerate troubleshooting and monitoring of design flows A day in the ... chip design engineers more efficient through seamless tool flows that power millions of Amazon ...
Utilization of AI tools to accelerate troubleshooting and monitoring of design flows A day in the ... chip design engineers more efficient through seamless tool flows that power millions of Amazon ...
DMTS Digital Design Engineer / Chip Lead
Boise, ID · On-site
$206K - $410K/yr
RTL Design: Author, review, and maintain synthesizable RTL (SystemVerilog) for all soft IP control ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
DMTS Digital Design Engineer / Chip Lead
Boise, ID · On-site
$206K - $410K/yr
RTL Design: Author, review, and maintain synthesizable RTL (SystemVerilog) for all soft IP control ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
SR RTL DESIGN
Boise, ID · On-site
Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
SR RTL DESIGN
Boise, ID · On-site
Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Principal RTL Design
Boise, ID · On-site
Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Principal RTL Design
Boise, ID · On-site
Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
SMTS Design Verification Engineer
Boise, ID · On-site
$129K - $158K/yr
... RTL before silicon is committed. This is a full-ownership DV role. You will write the DV plan ... Develop and maintain the full-chip DV plan covering all soft IP blocks and top-level integration ...
SMTS Design Verification Engineer
Boise, ID · On-site
$129K - $158K/yr
... RTL before silicon is committed. This is a full-ownership DV role. You will write the DV plan ... Develop and maintain the full-chip DV plan covering all soft IP blocks and top-level integration ...
Staff Verification Design Engineer, DRAM
$129K - $158K/yr
... RTL verification, STA, or Timing Accurate Verilog * Experience with silicon validation, test chip ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Staff Verification Design Engineer, DRAM
$129K - $158K/yr
... RTL verification, STA, or Timing Accurate Verilog * Experience with silicon validation, test chip ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Staff Verification Design Engineer, DRAM
Boise, ID · On-site
$129K - $158K/yr
... RTL verification, STA, or Timing Accurate Verilog * Experience with silicon validation, test chip ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Staff Verification Design Engineer, DRAM
Boise, ID · On-site
$129K - $158K/yr
... RTL verification, STA, or Timing Accurate Verilog * Experience with silicon validation, test chip ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Design and Verification Engineer, Pathfinding
Boise, ID · On-site
$67K - $170K/yr
The position begins with full-chip functional verification responsibilities and offers ... Exposure to RTL verification, static timing analysis (STA), or timing-accurate Verilog. The US base ...
Design and Verification Engineer, Pathfinding
Boise, ID · On-site
$67K - $170K/yr
The position begins with full-chip functional verification responsibilities and offers ... Exposure to RTL verification, static timing analysis (STA), or timing-accurate Verilog. The US base ...
This role offers hands-on ownership of RTL design and optimization while working closely with ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
This role offers hands-on ownership of RTL design and optimization while working closely with ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
This role offers hands-on ownership of RTL design and optimization while working closely with ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
This role offers hands-on ownership of RTL design and optimization while working closely with ... AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application ...
Staff Design Verification Engineer, DRAM
Boise, ID · On-site
$129K - $158K/yr
Create new methods and flows to guide DRAM chip design from verification view. * Create ... Focused experience and proficiency in work with LLMs and Agentic AI tools Preferred Qualifications
Staff Design Verification Engineer, DRAM
Boise, ID · On-site
$129K - $158K/yr
Create new methods and flows to guide DRAM chip design from verification view. * Create ... Focused experience and proficiency in work with LLMs and Agentic AI tools Preferred Qualifications
Staff Design Verification Engineer, DRAM
Boise, ID · On-site
$129K - $158K/yr
Create new methods and flows to guide DRAM chip design from verification view. * Create ... Focused experience and proficiency in work with LLMs and Agentic AI tools Preferred Qualifications
Staff Design Verification Engineer, DRAM
Boise, ID · On-site
$129K - $158K/yr
Create new methods and flows to guide DRAM chip design from verification view. * Create ... Focused experience and proficiency in work with LLMs and Agentic AI tools Preferred Qualifications
Principal Compute Pathfinding ASIC Design
Boise, ID · On-site
$164K - $358K/yr
Write detailed block-level and architectural specifications to guide RTL design, verification, and ... Using AI to improve job functions Minimum Qualifications * Master's degree in Electrical or ...
Principal Compute Pathfinding ASIC Design
Boise, ID · On-site
$164K - $358K/yr
Write detailed block-level and architectural specifications to guide RTL design, verification, and ... Using AI to improve job functions Minimum Qualifications * Master's degree in Electrical or ...
Principal Compute Pathfinding ASIC Design
$164K - $358K/yr
Write detailed blocklevel and architectural specifications to guide RTL design, verification, and ... Using AI to improve job functions Minimum Qualifications * Master's degree in Electrical or ...
Principal Compute Pathfinding ASIC Design
$164K - $358K/yr
Write detailed blocklevel and architectural specifications to guide RTL design, verification, and ... Using AI to improve job functions Minimum Qualifications * Master's degree in Electrical or ...
Drive innovation through test chip development, silicon validation, and AI-enabled improvements to design methodologies and workflows. Minimum Qualifications * Bachelor's degree in Electrical ...
Drive innovation through test chip development, silicon validation, and AI-enabled improvements to design methodologies and workflows. Minimum Qualifications * Bachelor's degree in Electrical ...
Drive innovation through test chip development, silicon validation, and AI-enabled improvements to design methodologies and workflows. Minimum Qualifications * Bachelor's degree in Electrical ...
Drive innovation through test chip development, silicon validation, and AI-enabled improvements to design methodologies and workflows. Minimum Qualifications * Bachelor's degree in Electrical ...
Ai Chip Design Rtl information
See Boise, ID salary details
$76.6K - $85.4K
0% of jobs
$85.4K - $94.3K
0% of jobs
$94.3K - $103.1K
1% of jobs
$103.1K - $111.9K
0% of jobs
$111.9K - $120.7K
0% of jobs
$124.4K is the 25th percentile. Wages below this are outliers.
$120.7K - $129.6K
57% of jobs
$133.4K is the 75th percentile. Wages above this are outliers.
$129.6K - $138.4K
38% of jobs
$138.4K - $147.2K
0% of jobs
$147.2K - $156K
1% of jobs
$156K - $164.9K
1% of jobs
$164.9K - $173.7K
1% of jobs
$76.6K
$132.6K
$173.7K
How much do ai chip design rtl jobs pay per year?
What is a $900000 AI job?
What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?
| Aspect | Ai Chip Design Rtl | Ai Chip Verification Engineer |
|---|---|---|
| Primary Focus | Developing and implementing Register Transfer Level (RTL) code for AI chips | Verifying and validating RTL designs to ensure functionality |
| Skills Required | HDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledge | Simulation, testbench creation, debugging, scripting skills |
| Work Environment | Design teams, hardware development labs, EDA tools | Verification teams, simulation environments, test setups |
| Certifications | Hardware design certifications, FPGA/ASIC training | Verification methodologies, UVM, SystemVerilog certifications |
While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.
Will AI replace RTL designers?
What are some common challenges faced by AI Chip Design RTL engineers during the verification process?
Which 3 jobs will survive AI?
What are AI Chip Design RTL engineers?
What is the salary of RTL design?
What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

Full-time
Re-posted 8 days ago
Amazon rating
7.4
Based on 7,023 frontline employees who took The Breakroom Quiz
6th of 39 rated national retailers
Job description
Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced innovative devices like Fire tablets, Fire TV and Amazon Echo
What will you help us create.
The Role: As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You will work closely with multi-disciplinary groups including Design, Verification, Physical Design, and Emulation teams to build and maintain a leading-edge ASIC development infrastructure that enables and accelerates their work.
Key job responsibilities
* Design and maintain ASIC development flows spanning RTL-to-GDSII, including RTL generation, simulation, synthesis, place & route, timing analysis, DRC/LVS, and sign-off
* Deploy and configure EDA tools from vendors (Synopsys, Cadence, Mentor/Siemens, etc.) across compute infrastructure
* Develop automation and CI/CD/regression to streamline design tasks, reduce manual effort, and improve consistency
* Troubleshoot tool issues and work with vendors to resolve bugs, performance bottlenecks, or licensing problems
* Work with IT teams to optimize compute and storage strategies to enhance engineering efficiency
* Create and maintain documentation for tool usage, flow methodologies, and best practices
* Utilization of AI tools to accelerate troubleshooting and monitoring of design flows
A day in the life
Your day starts by reviewing overnight build results and addressing any tool flow failures that blocked design teams. You'll troubleshoot issues, working directly with EDA vendors when needed to resolve bugs or performance bottlenecks. Mid-morning, you might deploy an updated version of a critical tool across the compute infrastructure, then spend time developing automation to streamline repetitive tasks
Afternoons often involve collaborating with Design, Verification, and Physical Design teams to optimize their workflows, and working with the Design Technology team on large-scale tool objectives. Throughout the day, you'll balance immediate firefighting with longer-term infrastructure improvements-your ultimate goal is making a large team of chip design engineers more efficient through seamless tool flows that power millions of Amazon devices.
About Amazon
Sourced by ZipRecruiter
Amazon.com, Inc., commonly known as Amazon, is an American multinational technology company. It was founded by Jeff Bezos in 1994 and initially started as an online marketplace for books. Since then, Amazon has expanded its operations and become one of the largest e-commerce companies in the world. Amazon's primary business is its online retail platform, where customers can purchase a vast array of products, including electronics, clothing, books, home goods, and much more. The company offers a convenient and user-friendly shopping experience, with features such as fast shipping, customer reviews, and personalized recommendations. In addition to its e-commerce platform, Amazon has diversified its business into various other areas. One of its notable ventures is Amazon Web Services (AWS), a comprehensive cloud computing platform that provides services such as storage, compute power, and database management to individuals and businesses. AWS has become a leader in the cloud computing industry, powering many websites and applications worldwide. Amazon has also developed its own consumer electronics, including the popular Amazon Kindle e-reader, Fire tablets, Fire TV streaming devices, and the Alexa-powered Echo smart speakers. The Alexa voice assistant, integrated into these devices, allows users to interact with their devices using voice commands, perform tasks, and access information. Furthermore, Amazon has expanded into media and entertainment. It operates Prime Video, a streaming service that offers a wide range of movies, TV shows, and original content. Amazon Music provides a platform for streaming and purchasing digital music, while Audible offers audiobooks and other audio content. The company's commitment to customer satisfaction and convenience is demonstrated by its membership program, Amazon Prime. Prime members receive various benefits, including free two-day shipping, access to streaming services, exclusive deals, and more.
Industry
It services, book publishers, retail, real estate and computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Seattle, WA, US