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Ai Chip Design Rtl Jobs in Pennsylvania (NOW HIRING)

Veeco Instruments, Inc.

PA · On-site

$107/hr

We design, develop, manufacture, and service highly complex, cutting-edge machines used by our ... chip packaging and AI workloads. Veeco is looking for a Quality Engineer to lead continuous ...

Veeco Instruments, Inc.

PA · On-site

We design, develop, manufacture, and service highly complex, cutting-edge machines used by our ... chip packaging and AI workloads. The Staff Project Engineer will play a critical role at Veeco. In ...

R Systems, Inc.

Product Manager

Harrisburg, PA · On-site

Our product mindset and engineering capabilities in Cloud, Data, AI, and CX enable us to serve key ... design, leading the development team, testing and implementation of the product. The Product ...

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Ai Chip Design Rtl information

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are popular job titles related to Ai Chip Design Rtl jobs in Pennsylvania?

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Ai Chip Design Rtl jobs near you

Director, Data Center Mechanical Engineering

Keel Infrastructure

Pittsburgh, PA • Hybrid

Full-time

Medical, Retirement

Re-posted 11 days ago

Job description

Careers at Keel  

Keel Infrastructure is a publicly traded energy and digital infrastructure company that develops and owns data centers and power assets across North America. 

At Keel, you're not just joining a company, you're helping build the infrastructure behind the future of compute. 

 

Why Keel 

We're at the intersection of energy and technology, two industries transforming in real time. 

The work is complex. The pace is fast. The impact is real. 

You'll be part of a team that values: 

  • Ownership - we take responsibility and follow through 
  • Collaboration - we work across teams, functions, and borders 
  • Curiosity - we ask questions and keep learning 
  • Endurance - we build for the long term 

 

What It Feels Like to Work Here 

  • Fast-moving, high-growth, and hands-on 
  • Smart, driven people solving real challenges together 
  • Work that directly supports AI and next-generation infrastructure 
  • Room to grow, stretch, and take on more 

 

What We Offer 

  • Competitive salary, bonus and equity opportunities 
  • Comprehensive health and wellness benefits 
  • Retirement savings with company contribution 
  • Employee referral program 

Interested? This is a great opportunity to work for a young and dynamic company!

We are currently looking for a Director, Data Center Mechanical Engineering to join our team!

 Purpose of the Role

The Director of Data Center Mechanical Engineering is a senior leadership role responsible for defining, owning, and continuously advancing the company's mechanical engineering standards across all dta center development projects. This individual will serve as the internal authority on cooling, airflow management, and mechanical plant design, ensuring that every facility we develop is built to the highest standards of performance, reliability and energy efficiency.

This role partners with engineering, construction, operations and procurement teams to drive informed design decisions from concept through commissioning and establishes the frameworks that govern how our portfolio is engineered for today and scaled for tomorrow.

Key Responsibilities

Engineering Leadership & Standards

  • Develop and own the company's mechanical engineering design standards, specifications, and basis-of-design documentation for all new data center development.
  • Establish and enforce mechanical engineering criteria for critical systems including chilled water plants, technology cooling systems, DX/CRAC systems, air handling, and containment strategies.
  • Lead the evaluation, selection, and standardization of mechanical systems and equipment across the portfolio.
  • Drive continuous improvement of PUE performance targets through innovative mechanical design strategies.
  • Define KPIs and portfolio analytics for executive leadership and the Board.
  • Ensure alignment between construction, finance, engineering, procurement, and operations functions.

Project Execution

  • Provide mechanical engineering leadership and technical review across all phases of development - from site feasibility and schematic design through design development, construction documents, and commissioning.
  • Review and approve mechanical design packages from external engineers of record (EORs), ensuring compliance with company standards and best practices.
  • Lead value engineering efforts for mechanical systems, balancing first cost, lifecycle cost, reliability, and schedule.
  • Support RFP development, bid evaluation, and contractor/vendor selection for mechanical scopes of work.

Team & Stakeholder Management

  • Build, mentor, and lead an internal mechanical engineering team as the company's portfolio grows.
  • Manage relationships with external engineering consultants, equipment manufacturers, and specialty subcontractors.
  • Collaborate with operations teams to ensure designs are optimized for long-term maintainability and operator efficiency.
  • Present mechanical design strategies and investment recommendations to executive leadership and investment committees.

Innovation & Technology Roadmap

  • Evaluate and pilot emerging cooling technologies including direct-to-chip solutions and rear-door heat exchangers for high-density AI/HPC workloads.
  • Benchmark company designs against industry best practices and competitive peers; identify and close gaps.
  • Participate in industry organizations (ASHRAE, 7x24 Exchange, The Green Grid) and contribute to thought leadership.
RequirementsExperience & Background
  • 12+ years of progressive mechanical engineering experience.
  • Demonstrated experience leading mechanical design on hyperscale, colocation, or enterprise data center projects (50MW+ preferred).
  • Experience as a technical owner or discipline lead, not just a contributor, on large capital projects.
  • Prior experience managing or mentoring engineering staff and external consultants.
Technical Knowledge
  • Deep knowledge of data center cooling architectures: air-side economization, water-side economization, chilled water systems, DX systems, evaporative cooling, and hybrid approaches.
  • Proficiency in mechanical system modeling and simulation tools (e.g., CFD for airflow, EnergyPlus, Trane TRACE, or similar).
  • Strong working knowledge of ASHRAE Standards 55, 90.1, TC9.9, and relevant TIA/EIA and Uptime Institute standards.
  • Familiarity with high-density and liquid-cooled deployments for AI/ML and HPC environments.
  • Experience with mechanical commissioning (Cx) and integrated systems testing (IST) protocols.
Leadership & Competencies
  • Ability to translate complex mechanical engineering concepts for non-technical audiences including executives and investors.
  • Strong organizational skills with the ability to manage multiple projects and competing priorities simultaneously.
  • Excellent written and verbal communication; experience authoring design standards and technical specifications.
  • Collaborative mindset with experience working cross-functionally in fast-paced development environments.
Educational Requirements
  • Bachelor's in Mechanical Engineering, or a related field.
  • Professional Engineer (PE) license strongly preferred.
  • Professional certifications (CDCDP, PMP, ATD, LEED AP, DCEP, or similar) are a significant asset.

Compensation & Benefits 

This is a Director-level position offering competitive compensation commensurate with experience.  

A few more relevant details:

We have an office in Pittsburgh.  Our typical work schedule is Monday-Thursday in office, Friday remote.

Apply