Advanced Micro Devices
Advanced Micro Devices

60 Advanced Micro Devices Asic Design Engineer Jobs Hiring Near You

next page

Showing results 1-20

Advanced Micro Devices Jobs Information

What are the key skills and qualifications needed to thrive as an ASIC Design Engineer, and why are they important?

To thrive as an ASIC Design Engineer, you need a solid background in electrical engineering, digital logic design, and proficiency with hardware description languages like Verilog or VHDL, usually backed by a relevant degree. Familiarity with EDA tools such as Synopsys or Cadence and knowledge of simulation and verification methodologies are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork set outstanding engineers apart in this role. These skills and qualities are vital for delivering complex, high-performance integrated circuits that meet strict specifications and project deadlines.

What are some common challenges faced by ASIC Design Engineers during the design and verification phases?

ASIC Design Engineers often encounter challenges such as meeting strict performance and power constraints while ensuring that the design remains within budget and time limits. Debugging complex logic errors during simulation and verification can be particularly demanding, as small mistakes can have significant downstream effects. Additionally, effective communication with cross-functional teams—including software, hardware, and validation engineers—is essential to resolve integration issues and meet project milestones. Adapting to rapidly evolving tools and technologies is also a key part of the role.

What are ASIC Design Engineers?

ASIC Design Engineers are professionals who design and develop Application-Specific Integrated Circuits (ASICs), which are custom-built semiconductor chips tailored for specific applications or products. They are responsible for the entire design process, including architecture definition, logic design, verification, synthesis, and sometimes physical layout. Their work is crucial in industries like consumer electronics, telecommunications, automotive, and more, ensuring that devices have optimized performance, power efficiency, and functionality for their intended uses.

What is the difference between Asic Design Engineer vs FPGA Design Engineer?

AspectAsic Design EngineerFPGA Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning custom chips for manufacturingDeveloping programmable logic designs for prototyping and deployment
Industry UsageSemiconductor companies, consumer electronics, automotivePrototyping, testing, and specialized hardware applications

Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.

What is it like to work at Advanced Micro Devices?

Advanced Micro Devices (AMD) is known for its collaborative and innovative culture, prioritizing employee growth and development within a dynamic and fast-paced environment.

The company's structure is divided into various teams, including engineering, research and development, and sales, which work together to drive innovation and deliver cutting-edge technologies. AMD's global presence and diverse product portfolio offer opportunities for employees to work on a wide range of projects and contribute to the company's mission of accelerating innovation in high-performance computing, graphics, and visualization technologies.

Working at AMD may appeal to candidates who are passionate about technology and innovation, as the company offers a range of opportunities for professional growth and development, including training programs, mentorship, and opportunities to work on high-profile projects.
What other companies are hiring for Asic Design Engineer jobs?
Infographic showing various Asic Design Engineer job openings at Advanced Micro Devices in the United States as of May 2026, with employment types broken down into 99% Full Time, and 1% Part Time. Highlights an 65% Physical, 33% Hybrid, and 2% Remote job distribution.
ASIC/SoC Design Engineer, RTL design for SoC IPs

ASIC/SoC Design Engineer, RTL design for SoC IPs

Advanced Micro Devices, Inc

San Jose, CA • On-site

$145.60K/yr

Full-time

Posted 17 days ago


Advanced Micro Devices rating

7.8

Company rating: 7.8 out of 10

Based on 6 frontline employees who took The Breakroom Quiz

53rd of 137 rated electronics manufacturers


Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
Join AMD's Silicon Design team to design and develop cutting-edge IPs for next-generation embedded products. As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture specification through production silicon, working on complex IP design.
THE PERSON:
The ideal candidate is a seasoned ASIC/SOC designer with proven expertise across the entire chip development lifecycle-from RTL design through silicon bring-up. You excel in Verilog RTL coding, timing closure, and physical design awareness. With multiple production tape-outs under your belt, you bring deep technical expertise, strong ownership, and the ability to mentor junior engineers while driving projects to successful completion.
KEY RESPONSIBILITIES:
  • RTL Design & Microarchitecture: Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements.
  • Full ASIC Development Lifecycle: Drive design from concept through production silicon across all phases: specification, RTL coding, lint/CDC checks, synthesis, timing analysis, verification, physical design integration, and post-silicon validation.
  • Timing Closure & Optimization: Develop and maintain timing constraints (SDC), perform static timing analysis (STA) using industry-standard tools (PrimeTime/Tempus), resolve timing violations, and collaborate with physical design to achieve timing closure.
  • SOC Integration: Integrate complex ASIC IP blocks into full-chip SOC environment, ensuring proper connectivity, clock domain crossings, and interface compliance with industry-standard protocols (AMBA AXI/AHB/APB, PCIe, CXL).
  • Design Quality & Verification: Partner with verification teams to ensure comprehensive functional coverage; implement design-for-test (DFT) and design-for-debug (DFD) features; participate in RTL quality reviews and signoff.
  • Physical Design Collaboration: Work closely with physical design engineers on floor planning, placement constraints, clock tree synthesis, and power grid design to ensure timing convergence and manufacturing readiness.
  • Automation & Productivity: Develop Python/Perl/Tcl scripts to automate repetitive tasks, improve design quality checks, and enhance team efficiency throughout the design flow.
  • Cross-Functional Collaboration: Engage with architecture, verification, physical design, CAD, and post-silicon teams to resolve complex technical challenges and deliver high-quality silicon on schedule.

REQUIRED QUALIFICATIONS:
  • Proven track record with 2+ production ASIC tape-outs in senior design roles
  • Expert-level Verilog RTL coding skills with deep understanding of synthesizable RTL constructs and coding best practices
  • Hands-on experience with the complete ASIC design flow: RTL • Synthesis • STA • Physical Design • Tape-out
  • Experience writing and debugging SDC timing constraints, including multi-cycle paths, false paths, and clock domain crossing constraints
  • Experience integrating complex IP blocks into SOC designs
  • Knowledge of industry-standard on-chip interconnect protocols (AMBA AXI/AHB/APB)
  • Bachelor's or Master's degree in Electrical Engineering or Computer Engineering

PREFERRED QUALIFICATIONS:
  • Knowledge of ARM architecture and AMBA protocol specifications
  • Familiarity with PCIe or CXL transaction layer protocols
  • Experience with low-power design techniques (clock gating, power gating, voltage scaling)
  • Proficiency in scripting languages: Python, Perl, Tcl, or Shell scripting
  • Exposure to formal verification tools for equivalence checking and property verification
  • Familiarity with AI-assisted design tools and modern EDA technologies
  • Experience mentoring junior engineers and leading design teams
  • Strong technical writing skills for design specifications and documentation
  • Excellent communication and collaboration skills in cross-functional environments

LOCATION: San Jose, CA
This role is not eligible for visa sponsorship.
#LI-RW1
#LI-HYBRID
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.