Learn more at www.analog.com and on LinkedIn and X. Senior Product Development Engineer About the ... Deep hands-on experience validating high-speed digital links (e.g., SerDes/JESD/related PHY ...
X Phy
60 jobs near Columbus, OH
Learn more at www.analog.com and on LinkedIn and X. Senior Product Development Engineer About the ... Deep hands-on experience validating high-speed digital links (e.g., SerDes/JESD/related PHY ...
Senior IC Packaging Engineer
San Jose, CA · On-site
$122K - $168K/yr
... PHY (PCIe, CXL), LPDDR5, UCIe, and Other multi-gigabit interfaces. * Define substrate stack-ups ... x or 10G interfaces * Experience defining die-to-die and chiplet based RDL/bump architecture.
Senior IC Packaging Engineer
San Jose, CA · On-site
$122K - $168K/yr
... PHY (PCIe, CXL), LPDDR5, UCIe, and Other multi-gigabit interfaces. * Define substrate stack-ups ... x or 10G interfaces * Experience defining die-to-die and chiplet based RDL/bump architecture.
... PHY's, and other connectivity interfaces in excess of 25Gbps. Responsibilities include: * Lead ... 3.x), or PCIExpress * Experience reviewing schematics and layouts forsilicon validation or ...
... PHY's, and other connectivity interfaces in excess of 25Gbps. Responsibilities include: * Lead ... 3.x), or PCIExpress * Experience reviewing schematics and layouts forsilicon validation or ...
Firmware Architect
San Jose, CA · On-site
$150K - $300K/yr
... MSI-X and AER handling, reset/FLR, power management, telemetry, and in-field firmware update ... Be the technical bridge between firmware/software and architecture, RTL, DV, PHY/IP vendors and ...
Firmware Architect
San Jose, CA · On-site
$150K - $300K/yr
... MSI-X and AER handling, reset/FLR, power management, telemetry, and in-field firmware update ... Be the technical bridge between firmware/software and architecture, RTL, DV, PHY/IP vendors and ...
ADVANCED PRACTICE NURSE (NURSE PRACT/FAMILY PRACTICE)
Bremerton, WA · On-site
$93K - $128K/yr
Determines the need for and orders laboratory tests, X-rays and other procedures necessary to complete the assessment of the patient. Discriminates between normal and abnormal findings to recognize ...
ADVANCED PRACTICE NURSE (NURSE PRACT/FAMILY PRACTICE)
Bremerton, WA · On-site
$93K - $128K/yr
Determines the need for and orders laboratory tests, X-rays and other procedures necessary to complete the assessment of the patient. Discriminates between normal and abnormal findings to recognize ...
Learn more at www.analog.comand on LinkedIn and X. Senior Product Development Engineer About the ... Deep hands-on experience validating high-speed digital links (e.g., SerDes/JESD/related PHY ...
Learn more at www.analog.comand on LinkedIn and X. Senior Product Development Engineer About the ... Deep hands-on experience validating high-speed digital links (e.g., SerDes/JESD/related PHY ...
... PHY's, and other connectivity interfaces in excess of 25Gbps. Responsibilities include: * Lead ... 3.x), or PCIExpress * Experience reviewing schematics and layouts forsilicon validation or ...
... PHY's, and other connectivity interfaces in excess of 25Gbps. Responsibilities include: * Lead ... 3.x), or PCIExpress * Experience reviewing schematics and layouts forsilicon validation or ...
Learn more at www.analog.comand on LinkedIn and X. Senior Product Development Engineer About the ... Deep hands-on experience validating high-speed digital links (e.g., SerDes/JESD/related PHY ...
Learn more at www.analog.comand on LinkedIn and X. Senior Product Development Engineer About the ... Deep hands-on experience validating high-speed digital links (e.g., SerDes/JESD/related PHY ...
Sr Staff Engineer, Factory Board Test (AI2502)
San Jose, CA · On-site
$155K - $248K/yr
Strong understanding of high-speed interfaces (PCIe Gen 3/4/5, DDR4/5, USB 3.x, Ethernet, MIPI CSI-2/D-PHY) and their test challenges at the board level. * Power Integrity & Signal Integrity:
Sr Staff Engineer, Factory Board Test (AI2502)
San Jose, CA · On-site
$155K - $248K/yr
Strong understanding of high-speed interfaces (PCIe Gen 3/4/5, DDR4/5, USB 3.x, Ethernet, MIPI CSI-2/D-PHY) and their test challenges at the board level. * Power Integrity & Signal Integrity:
Learn more about NYU Langone Hospital--Long Island , and interact with us on LinkedIn , Glassdoor , Indeed , Facebook , X , YouTube and Instagram . Position Summary: We have an exciting opportunity ...
Learn more about NYU Langone Hospital--Long Island , and interact with us on LinkedIn , Glassdoor , Indeed , Facebook , X , YouTube and Instagram . Position Summary: We have an exciting opportunity ...
NON INSTRUCTIONAL MONITOR
Lawrence, KS · On-site
HOURS/DAY: 2.5 x 4 days/week = 10/week DAYS PER YEAR: 171 Purpose Statement The job of Non-Instructional Monitor is done for the purpose/s of monitoring the activities of students in a variety of ...
NON INSTRUCTIONAL MONITOR
Lawrence, KS · On-site
HOURS/DAY: 2.5 x 4 days/week = 10/week DAYS PER YEAR: 171 Purpose Statement The job of Non-Instructional Monitor is done for the purpose/s of monitoring the activities of students in a variety of ...
... PHY's, and other connectivity interfaces in excess of 25Gbps. Responsibilities include: * Lead ... x), or PCI-Express * Experience reviewing schematics and layouts for silicon validation or ...
... PHY's, and other connectivity interfaces in excess of 25Gbps. Responsibilities include: * Lead ... x), or PCI-Express * Experience reviewing schematics and layouts for silicon validation or ...
Sr Staff Engineer, Factory Board Test (AI2502)
San Jose, CA · On-site
$155K - $248K/yr
Strong understanding of high-speed interfaces (PCIe Gen 3/4/5, DDR4/5, USB 3.x, Ethernet, MIPI CSI-2/D-PHY) and their test challenges at the board level. * Power Integrity & Signal Integrity:
Sr Staff Engineer, Factory Board Test (AI2502)
San Jose, CA · On-site
$155K - $248K/yr
Strong understanding of high-speed interfaces (PCIe Gen 3/4/5, DDR4/5, USB 3.x, Ethernet, MIPI CSI-2/D-PHY) and their test challenges at the board level. * Power Integrity & Signal Integrity:
Learn more at www.analog.comand on LinkedIn and X. Principal Engineer, Systems Design/Architecture ... Develop deep expertise on the GMSL PHY, link layer, and protocol adapters. * Create comprehensive ...
Learn more at www.analog.comand on LinkedIn and X. Principal Engineer, Systems Design/Architecture ... Develop deep expertise on the GMSL PHY, link layer, and protocol adapters. * Create comprehensive ...
Staff Embedded Firmware Engineer, High Speed DSP
Sunnyvale, CA · On-site
$120K - $165K/yr
info_outline X Note: By applying to this position you will have an opportunity to share your ... Experience developing embedded software (C/C ) for high-speed physical-layer interfaces (PHY ...
New
Staff Embedded Firmware Engineer, High Speed DSP
Sunnyvale, CA · On-site
$120K - $165K/yr
info_outline X Note: By applying to this position you will have an opportunity to share your ... Experience developing embedded software (C/C ) for high-speed physical-layer interfaces (PHY ...
New
Experience with PCIe endpoint firmware at the PHY, Link, and Transaction layers; familiarity with PCIe enumeration, MSI/MSI-X, SR-IOV, and error handling * Hands-on experience with PCIe/CXL protocol ...
Experience with PCIe endpoint firmware at the PHY, Link, and Transaction layers; familiarity with PCIe enumeration, MSI/MSI-X, SR-IOV, and error handling * Hands-on experience with PCIe/CXL protocol ...
... PHY's, and other connectivity interfaces in excess of 25Gbps. Responsibilities include: * Lead ... 3.x), or PCIExpress * Experience reviewing schematics and layouts forsilicon validation or ...
... PHY's, and other connectivity interfaces in excess of 25Gbps. Responsibilities include: * Lead ... 3.x), or PCIExpress * Experience reviewing schematics and layouts forsilicon validation or ...
Carries out physician orders such as administering prescribed medications or treatments, preparing an operating room, order lab tests, x-rays, etc... * Cleans and prepares rooms between procedures ...
Carries out physician orders such as administering prescribed medications or treatments, preparing an operating room, order lab tests, x-rays, etc... * Cleans and prepares rooms between procedures ...
Staff Mixed-Signal Design Engineer
Austin, TX · On-site
$131.29 - $190.11/hr
Learn more at www.analog.com and on LinkedIn and X.## **ADI**Analog Devices, Inc. (NASDAQ: ADI) is ... While not a must, experience in high-speed data converter or SerDes PHY design is a strong plus.
Staff Mixed-Signal Design Engineer
Austin, TX · On-site
$131.29 - $190.11/hr
Learn more at www.analog.com and on LinkedIn and X.## **ADI**Analog Devices, Inc. (NASDAQ: ADI) is ... While not a must, experience in high-speed data converter or SerDes PHY design is a strong plus.
Learn more at www.analog.comand on LinkedIn and X. ADI Analog Devices, Inc. (NASDAQ: ADI) is a ... While not a must, experience in high-speed data converter or SerDes PHY design is a strong plus.
Learn more at www.analog.comand on LinkedIn and X. ADI Analog Devices, Inc. (NASDAQ: ADI) is a ... While not a must, experience in high-speed data converter or SerDes PHY design is a strong plus.
Full-time
Medical, Dental, Vision, Retirement, PTO
Re-posted 7 days ago
Analog Devices rating
8.5
Based on 17 frontline employees who took The Breakroom Quiz
33rd of 157 rated electronics manufacturers
Job description
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
Senior Product Development Engineer
About the Role
High Speed Interface (HSI) development at Analog Devices requires ownership of interface bring-up, validation, and product readiness across complex mixed-signal ICs. The role leads qualification and characterization work for high-speed interfaces (e.g., SerDes, JESD, high-speed clocking and digital links), partnering closely with design, test, and applications teams to ensure robust performance from first silicon through release. The position also guides junior engineers and improves lab/automation methods to increase validation throughput and quality.
Key Responsibilities
- Interface development & validation: High-speed interface bring-up, compliance validation, margin testing, and debug across boards and lab setups.
- Qualification leadership: Qualification planning and execution for interface-related requirements across multiple product lines, including definition of test conditions and pass/fail criteria.
- Characterization & release readiness: Interface characterization across PVT and configuration space; correlation of bench data to simulation/model expectations; definition of operating limits and recommended settings.
- Debug & root-cause isolation: Signal integrity and protocol-level debug (eye diagrams, jitter, BER, equalization behavior, lane mapping, link training) with clear closure plans.
- Production/test correlation: Correlation between bench characterization and ATE results; support for test content, limits, guard-bands, and yield robustness for interface metrics.
- Automation & process improvement: Validation framework development (Python/MATLAB/instrument control), data reduction, and repeatable measurement "recipes" that simplify complexity and improve throughput.
- Technical leadership: Technical guidance and mentoring for junior engineers, including review of debug approaches, test plans, and characterization results.
- Cross-functional collaboration: Clear communication of interface risks, status, and recommendations to design, test, and program stakeholders.
Must Have Skills
- High-Speed Interface Validation: Deep hands-on experience validating high-speed digital links (e.g., SerDes/JESD/related PHY concepts) from bring-up through release.
- Signal Integrity & Measurements: Strong fundamentals and lab skill with eye diagrams, jitter sources, BER testing, equalization behavior, and high-speed probing/fixtures.
- Lab Automation & Data Analysis: Proven ability to build repeatable validation flows and analyze large datasets (Python preferred; MATLAB acceptable).
- Mixed-Signal Product Development: Experience supporting mixed-signal IC evaluation/characterization and translating lab data into product guidance and limits.
- Qualification Testing: Leadership in developing and implementing qualification/characterization programs tied to interface requirements.
- Production Optimization: Ability to improve validation throughput and reliability via tooling, documentation, and process simplification.
- Cross-Functional Execution: Track record of coordinating across design/test/apps to drive issues to closure and hit milestones.
Preferred Education and Experience
- Master's degree in Electrical Engineering or related field preferred.
- 5+ years of relevant experience in high-speed interface validation, mixed-signal product development, or related roles.
- Demonstrated technical leadership abilities
- Experience with FPGA-based validation platforms and/or embedded software/firmware workflows.
- Strong cross-functional collaboration skills
Why You'll Love Working at ADI
At Analog Devices, you'll be part of a collaborative and innovative team that's shaping the future of technology. We offer a supportive environment focused on professional growth, competitive compensation and benefits, work-life balance, and the opportunity to work on cutting-edge projects that make a real impact on the world.
You'll have access to continuous learning opportunities and mentorship from industry experts. Join us and help create the technologies that bridge the physical and digital worlds, making a tangible difference in how people live, work, and connect.
#LI-PG1
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
The expected wage range for a new hire into this position is $110,385 to $151,808.
- Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.
- This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
- This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.
What Analog Devices employees say
Pay
Benefits
Hours and flexibility
Workplace
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About Analog Devices
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Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.
Industry
Electrical equipment, appliance, and component manufacturing
Company size
5,001 - 10,000 Employees
Headquarters location
Norwood, MA, US
Year founded
1965