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venturesoft Global

venturesoft Global

8 jobs near Columbus, OH

VentureSoft Global

DFT Engineer

San Jose, CA · On-site

Principal DFT Engineer-San Jose,CA We are hiring for a Principal DFT Engineer with strong Siemens Tessent experience for onsite opportunity in San Jose, CA. Key DFT Responsibilities & Skills: * Tool ...

VentureSoft Global

Recruiter

Philadelphia, PA · On-site

Recruiter The Recruiter / Career Navigator is responsible for student recruitment, admissions, case management, and job placement support. This role ensures participants successfully complete ...

VentureSoft Global

Program Manager

Philadelphia, PA · On-site

Program Manager The Program Manager provides strategic leadership and operational oversight for workforce training initiatives and directs a team delivering entrepreneurship and business support ...

VentureSoft Global

Administrative Support

Philadelphia, PA · On-site

$19.25 - $24.50/hr

Administrative Support / Data Coordinator The Administrative Support/Data Coordinator manages program documentation, scheduling, and data reporting. This role ensures accurate tracking of participant ...

ASIC Design Verification Engineer

VentureSoft Global

Austin, TX • On-site

$134K - $164K/yr

Other

Posted 10 days ago

Job description

Job Title: Senior ASIC Design Verification Engineer
Location: Austin, TX / San Francisco, CA (Onsite/Hybrid)
 
Job Summary
 
We are seeking an experienced Senior ASIC Design Verification Engineer to verify next-generation CPU, AI/ML, and SoC designs. The ideal candidate will have strong expertise in developing UVM-based verification environments, functional coverage, RTL debug, and constrained-random verification while working closely with design and architecture teams from specification through tape-out.
 
Primary Skills (Must Have)
  • SystemVerilog & UVM
  • Constrained Random Verification (CRV)
  • Functional Coverage & Coverage Closure
  • RTL Debug & ASIC/SoC Verification
Key Responsibilities
  • Develop UVM/SystemVerilog verification environments.
  • Create test plans, testbenches, sequences, scoreboards, and checkers.
  • Perform block-level and full-chip ASIC/SoC verification.
  • Execute constrained-random and directed testing.
  • Debug RTL issues and drive functional coverage closure.
  • Collaborate with design, architecture, and validation teams.
  • Support regression, verification signoff, and tape-out activities.
Preferred Skills
  • CPU/Processor or Memory Subsystem Verification
  • SVA (SystemVerilog Assertions)
  • ARM, RISC, AI/ML Accelerator, or GPU verification
  • Experience with VCS, Questa, or Xcelium
  • Python or C/C++
Education
Bachelor''''''''s or Master''''''''s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
 

Thanks,

Vinutha

Venturesoft.ai

 

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