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System Verification

60 jobs near Columbus, OH

Retym

ASIC Verification Engineer

Austin, TX · On-site

Performed at last 2 or more full block/system verification cycles. * In depth knowledge in VLSI verification flow, languages and concepts. * Experience in data path or data protocols, specifically ...

Katalyst

Verification Lead

Andover, MA · On-site

$137K/yr

* We are seeking a Verification Lead to own the verification strategy for our medical device products and ensure that our software and systems meet their specified requirements and in compliance with ...

Retym

ASIC Senior Verification Engineer

Austin, TX · On-site

Performed at last 2 or more full block/system verification cycles. * In depth knowledge in VLSI verification flow, languages and concepts. * Experience in data path or data protocols, specifically ...

Rolls-Royce plc

... system verification evidence to airworthiness authorities.In this role, you will have the opportunity to travel up to 20% between Rolls-Royce sites and up to 10% other travel.**Why Rolls-Royce?

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ASIC Verification Technical-Lead Engineer

Austin, TX • On-site

Retym
See more jobs at Retymexternal

Full-time

Re-posted 26 days ago

Job description

Description
For an exciting well-funded start-up, developing leading edge technology of the next generation high speed communication, we are looking for a Verification Team-Leader to be driving into the complicated RTL design verification activity on various design aspects.
Requirements
Key Responsibilities
  • Lead, mentor, and manage a team of verification engineers to meet project milestones and deliverables.
  • Define and execute verification strategies and plans for complex digital blocks and systems.
  • Oversee the development of robust and reusable verification environments using SystemVerilog and UVM.
  • Review and approve verification plans, testbenches, and coverage metrics.
  • Drive functional and coverage-based verification across multiple block/system verification cycles.
  • Collaborate with design engineers to debug and resolve functionality issues.
  • Ensure effective resource allocation and project planning to achieve optimal results.
  • Foster a culture of technical excellence, continuous learning, and innovation within the team.
  • Report verification progress, issues, and risks to senior management and other stakeholders.

Required Qualifications
  • 10+ years of experience in digital design verification-a must.
  • 3+ years of experience managing or leading verification teams.
  • Proven track record of completing two or more full block/system verification cycles.
  • In-depth knowledge of VLSI verification flows, concepts, methodologies and interfaces with algorithmic models and SW.
  • Expertise in verification using SystemVerilog, UVM, or other industry-standard methodologies (eRM, OVM).
  • Experience in block, cluster and full chip verification levels.
  • Strong problem-solving skills and the ability to debug complex functionality issues.
  • Excellent leadership, communication, and organizational skills to manage and inspire a team.

Preferred Qualifications
  • Hands-on experience with high-speed communication protocols like Ethernet, PCIe, or SerDes.
  • Proficiency in scripting languages (e.g., Python, Perl) for automation of verification processes.
  • Familiarity with formal verification techniques and tools.
  • Background in system-level verification or post-silicon validation.
  • Experience with project planning tools and methodologies for effective team management.

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