This will require working closely with Graphics Architects, Chip/SoC Leads, IP designers, Systems ... SVA • Experience with FPGA and SoC design flows, tools and methodology • Experience with ...
29 Sva Graphic Designer Jobs Hiring Near You
This will require working closely with Graphics Architects, Chip/SoC Leads, IP designers, Systems ... SVA • Experience with FPGA and SoC design flows, tools and methodology • Experience with ...
Lead Formal Verification Engineer
Austin, TX · On-site
$156K/yr
... graphics IP. * Lead formal verification efforts for complex GPU and processor designs while ... Proven expertise in SystemVerilog Assertions (SVA), property development, and abstract model ...
Lead Formal Verification Engineer
Austin, TX · On-site
$156K/yr
... graphics IP. * Lead formal verification efforts for complex GPU and processor designs while ... Proven expertise in SystemVerilog Assertions (SVA), property development, and abstract model ...
Verification Engineer
Thornhill, ON · Hybrid
... designs with System Verilog Assertions (SVA) and industry leading formal tools * Debug tests with ... Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus.
New
Verification Engineer
Thornhill, ON · Hybrid
... designs with System Verilog Assertions (SVA) and industry leading formal tools * Debug tests with ... Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus.
New
Lead Formal Verification Engineer
Austin, TX · Hybrid
$134K/yr
... graphics IP. * Lead formal verification efforts for complex GPU and processor designs while ... Proven expertise in SystemVerilog Assertions (SVA), property development, and abstract model ...
Lead Formal Verification Engineer
Austin, TX · Hybrid
$134K/yr
... graphics IP. * Lead formal verification efforts for complex GPU and processor designs while ... Proven expertise in SystemVerilog Assertions (SVA), property development, and abstract model ...
Verification Engineer
Thornhill, ON · Hybrid
... designs with System Verilog Assertions (SVA) and industry leading formal tools * Debug tests with ... Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus.
Verification Engineer
Thornhill, ON · Hybrid
... designs with System Verilog Assertions (SVA) and industry leading formal tools * Debug tests with ... Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus.
SoC Verification Engineer - NoC / UVM
San Jose, CA · Hybrid
$159K/yr
... designs with System Verilog Assertions (SVA) and industry leading formal tools * Debug tests with ... Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus.
SoC Verification Engineer - NoC / UVM
San Jose, CA · Hybrid
$159K/yr
... designs with System Verilog Assertions (SVA) and industry leading formal tools * Debug tests with ... Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus.
Formal Verification Engineer
Austin, TX · Hybrid
$134K/yr
Whether you're designing next-gen processors, enabling AI breakthroughs, or creating go-to-market ... Infinity Fabric is part of every new AMD product being developed for AI/ML, Client, Server, Graphic ...
Formal Verification Engineer
Austin, TX · Hybrid
$134K/yr
Whether you're designing next-gen processors, enabling AI breakthroughs, or creating go-to-market ... Infinity Fabric is part of every new AMD product being developed for AI/ML, Client, Server, Graphic ...
Staff GPU Design Verification Engineer - Formal Verification
Austin, TX · On-site
$134K/yr
Solid understanding of computer architecture and graphics pipelines. * Strong programming and ... Proficiency in SystemVerilog and SystemVerilog Assertions (SVA). * Working knowledge of formal ...
Staff GPU Design Verification Engineer - Formal Verification
Austin, TX · On-site
$134K/yr
Solid understanding of computer architecture and graphics pipelines. * Strong programming and ... Proficiency in SystemVerilog and SystemVerilog Assertions (SVA). * Working knowledge of formal ...
... designs, ensuring functional correctness, power gating mechanisms, and architectural intent. You ... Strong understanding of computer architecture and graphics pipelines. * Strong programming and ...
... designs, ensuring functional correctness, power gating mechanisms, and architectural intent. You ... Strong understanding of computer architecture and graphics pipelines. * Strong programming and ...
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than ... Verify AI-related sophisticated ASIC designs & features with formal verification methods. Multi ...
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than ... Verify AI-related sophisticated ASIC designs & features with formal verification methods. Multi ...
... designs, ensuring functional correctness, power gating mechanisms, and architectural intent. You ... Strong understanding of computer architecture and graphics pipelines. * Strong programming and ...
... designs, ensuring functional correctness, power gating mechanisms, and architectural intent. You ... Strong understanding of computer architecture and graphics pipelines. * Strong programming and ...
... designs, ensuring functional correctness, power gating mechanisms, and architectural intent. You ... Strong understanding of computer architecture and graphics pipelines. * Strong programming and ...
... designs, ensuring functional correctness, power gating mechanisms, and architectural intent. You ... Strong understanding of computer architecture and graphics pipelines. * Strong programming and ...
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than ... Verify AI-related sophisticated ASIC designs & features with formal verification methods. * Multi ...
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than ... Verify AI-related sophisticated ASIC designs & features with formal verification methods. * Multi ...
Senior Formal Verification Engineer - LPU
OR · On-site +1
$104K - $143K/yr
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than ... Verify AI-related sophisticated ASIC designs & features with formal verification methods. * Multi ...
Senior Formal Verification Engineer - LPU
OR · On-site +1
$104K - $143K/yr
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than ... Verify AI-related sophisticated ASIC designs & features with formal verification methods. * Multi ...
Senior Formal Verification Engineer - LPU
OR · On-site +1
$104K - $143K/yr
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than ... Verify AI-related sophisticated ASIC designs & features with formal verification methods. Multi ...
Senior Formal Verification Engineer - LPU
OR · On-site +1
$104K - $143K/yr
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than ... Verify AI-related sophisticated ASIC designs & features with formal verification methods. Multi ...
... ranging from consumer graphics to self-driving cars and the growing field of artificial ... Proficiency in Object Oriented Programming, Verilog, System Verilog, UVM, SVA and functional ...
... ranging from consumer graphics to self-driving cars and the growing field of artificial ... Proficiency in Object Oriented Programming, Verilog, System Verilog, UVM, SVA and functional ...
... graphics, autonomous vehicles, and the rapidly evolving realm of artificial intelligence. Our ... Collaborate with architects, designers, and both pre- and post-silicon verification teams to drive ...
... graphics, autonomous vehicles, and the rapidly evolving realm of artificial intelligence. Our ... Collaborate with architects, designers, and both pre- and post-silicon verification teams to drive ...
... ranging from consumer graphics to self-driving cars and the growing field of artificial ... Proficiency in Object Oriented Programming, Verilog, System Verilog, UVM, SVA and functional ...
... ranging from consumer graphics to self-driving cars and the growing field of artificial ... Proficiency in Object Oriented Programming, Verilog, System Verilog, UVM, SVA and functional ...
... ranging from consumer graphics to self-driving cars and the growing field of artificial ... Proficiency in Object Oriented Programming, Verilog, System Verilog, UVM, SVA and functional ...
... ranging from consumer graphics to self-driving cars and the growing field of artificial ... Proficiency in Object Oriented Programming, Verilog, System Verilog, UVM, SVA and functional ...
... graphics, autonomous vehicles, and the rapidly evolving realm of artificial intelligence. Our ... Collaborate with architects, designers, and both pre- and post-silicon verification teams to drive ...
... graphics, autonomous vehicles, and the rapidly evolving realm of artificial intelligence. Our ... Collaborate with architects, designers, and both pre- and post-silicon verification teams to drive ...
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US_West | Graphic User interface Designer / UX / ergonomics_L3
San Francisco, CA • On-site
Full-time
Re-posted 5 days ago
Job description
Description:
Possible 3 Month CTH | No Fees | Do Not Re-Post | Confidential
Submit candidates under their legal name and use only Capgemini template
Role: Design Verification Engineer
Work location: San Francisco, California (Remote)
Start date: Immediate availability
Background check MANDATORY
Request ID: 10914336, 10962695
JOB DESCRIPTION
Design Verification Engineer
As a Design Verification Engineer (DVE), you will be a member of a small team which owns verification of our graphics IP's and SoC's in prototype and SoC design environment. Your work will establish functional and performance benchmarks for our existing graphics solutions and feed directly into solutions. To achieve this, you will lead the definition, execution and continuous improvement of a robust design verification (DV) methodology and tools flow across different verification platforms. Your responsibilities will extend to IP and SoC design verification (DV), from the RTL level to emulation, resulting in fully functional and performant IP's/SoC's. This will require working closely with Graphics Architects, Chip/SoC Leads, IP designers, Systems/Validation Leads as well as external SoC design partners.
Responsibilities
• Develop and implement test/verification plans, methodologies and tool flows for graphics IPs
• Define and implement IP/SoC verification plans, test benches and simulation/emulation coverage leading to fully functional and performant graphics IPs/SoCs
• Drive DV plan development and execution through post-silicon bringup/validation
• Define and implement system/integration tests
• Work with cross functional teams to identify best verification methodology
• Build or leverage highly automated & flexible DV environments/flows spanning prototypes, SoC's and hardware emulation platforms
• Support integration of IP block tests into larger SoC environment tests
Minimum Qualifications
• BS Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience
• 6+ years of experience in RTL verification for FPGAs or ASICs
• Experience with SystemVerilog UVM testbenches, coverage analysis, and SVA
• Experience with FPGA and SoC design flows, tools and methodology
• Experience with industry standard RTL simulators, emulators and waveform debugging tools
• Experience with Python3 scripting
Preferred Qualifications
• Master's degree in Electrical Engineering, Computer Engineering or Computer Science
• Experience as an RTL designer
• Experience in development environment creation from scratch
• Experience in verifying designs generated with high level synthesis
• Experience with complex SoCs
• Experience with development of fully automated flows from specification to fully verified designs
• Experience with Software/Hardware Co-simulation (DPI/VPI)
• Experience with verification of high speed interfaces like PCIe, USB, MIPI
• Experience with on-chip bus protocols (AXI, AXI-Lite, AHB)
• Experience with post-silicon lab/bench test/validation
• Knowledge of formal verification
Please add the below to the comments section:
Legal Name:
Current Location: (City, State & Zip Code):
Home location:
Relocate:
Bill Rate:
CTH After 3 Months:
Travelling Availability:
Availability to Start:
Phone/Mobile Number:
Skype ID:
Email Address:
Visa Type:
Visa Expiration Date:
Hiring Status:
Are you working directly with the contractor's visa holder:
If not indicate # of layers and names of the company:
Indicate if the Candidate has worked in CG before and where:
Ex-Capgemini Employee:
LinkedIn Account: (If available)
Time slots for an interview:
Contractor approved to share its resume to client:
Skills summary:
**VIDEO INTERVIEW IS MANDATORY
- ERM
Daycira Salguero| Capgemini North America
Tel.: +1 888-229-2961
Possible 3 Month CTH | No Fees | Do Not Re-Post | Confidential
Submit candidates under their legal name and use only Capgemini template
Role: Design Verification Engineer
Work location: San Francisco, California (Remote)
Start date: Immediate availability
Background check MANDATORY
Request ID: 10914336, 10962695
JOB DESCRIPTION
Design Verification Engineer
As a Design Verification Engineer (DVE), you will be a member of a small team which owns verification of our graphics IP's and SoC's in prototype and SoC design environment. Your work will establish functional and performance benchmarks for our existing graphics solutions and feed directly into solutions. To achieve this, you will lead the definition, execution and continuous improvement of a robust design verification (DV) methodology and tools flow across different verification platforms. Your responsibilities will extend to IP and SoC design verification (DV), from the RTL level to emulation, resulting in fully functional and performant IP's/SoC's. This will require working closely with Graphics Architects, Chip/SoC Leads, IP designers, Systems/Validation Leads as well as external SoC design partners.
Responsibilities
• Develop and implement test/verification plans, methodologies and tool flows for graphics IPs
• Define and implement IP/SoC verification plans, test benches and simulation/emulation coverage leading to fully functional and performant graphics IPs/SoCs
• Drive DV plan development and execution through post-silicon bringup/validation
• Define and implement system/integration tests
• Work with cross functional teams to identify best verification methodology
• Build or leverage highly automated & flexible DV environments/flows spanning prototypes, SoC's and hardware emulation platforms
• Support integration of IP block tests into larger SoC environment tests
Minimum Qualifications
• BS Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience
• 6+ years of experience in RTL verification for FPGAs or ASICs
• Experience with SystemVerilog UVM testbenches, coverage analysis, and SVA
• Experience with FPGA and SoC design flows, tools and methodology
• Experience with industry standard RTL simulators, emulators and waveform debugging tools
• Experience with Python3 scripting
Preferred Qualifications
• Master's degree in Electrical Engineering, Computer Engineering or Computer Science
• Experience as an RTL designer
• Experience in development environment creation from scratch
• Experience in verifying designs generated with high level synthesis
• Experience with complex SoCs
• Experience with development of fully automated flows from specification to fully verified designs
• Experience with Software/Hardware Co-simulation (DPI/VPI)
• Experience with verification of high speed interfaces like PCIe, USB, MIPI
• Experience with on-chip bus protocols (AXI, AXI-Lite, AHB)
• Experience with post-silicon lab/bench test/validation
• Knowledge of formal verification
Please add the below to the comments section:
Legal Name:
Current Location: (City, State & Zip Code):
Home location:
Relocate:
Bill Rate:
CTH After 3 Months:
Travelling Availability:
Availability to Start:
Phone/Mobile Number:
Skype ID:
Email Address:
Visa Type:
Visa Expiration Date:
Hiring Status:
Are you working directly with the contractor's visa holder:
If not indicate # of layers and names of the company:
Indicate if the Candidate has worked in CG before and where:
Ex-Capgemini Employee:
LinkedIn Account: (If available)
Time slots for an interview:
Contractor approved to share its resume to client:
Skills summary:
**VIDEO INTERVIEW IS MANDATORY
- ERM
Daycira Salguero| Capgemini North America
Tel.: +1 888-229-2961
About Redolent
Sourced by ZipRecruiter
Redolent, a dynamic and rapidly expanding company committed to excellence in software solutions, where success is fueled by a combination of technical expertise and efficient management practices. Our solutions create a measurable delta in our clients’ productivity and profitability, contributing to their growth and success.
Industry
It services
Company size
51 - 200 Employees
Headquarters location
San Jose, CA, US
Year founded
2008