Meta's Silicon Engineering organization is building custom silicon solutions that power the ... Develop and maintain C++ models of AI chip IPs and subsystems for architecture exploration ...
Ips Custom Automation
60 Ips Custom Automation Jobs Hiring Near You
Meta's Silicon Engineering organization is building custom silicon solutions that power the ... Develop and maintain C++ models of AI chip IPs and subsystems for architecture exploration ...
Control Systems Programmer (Crestron)
Midvale, UT · On-site
$70K - $110K/yr
Networking - DHCP & static IPs, subnetting and VLAN awareness, multicast/IGMP, mDNS, device ... custom home automation in Utah -- over 20 years in business, more than 100 employees, and still ...
Control Systems Programmer (Crestron)
Midvale, UT · On-site
$70K - $110K/yr
Networking - DHCP & static IPs, subnetting and VLAN awareness, multicast/IGMP, mDNS, device ... custom home automation in Utah -- over 20 years in business, more than 100 employees, and still ...
Control Systems Programmer (Crestron)
Midvale, UT · On-site
$70K - $110K/yr
Networking - DHCP & static IPs, subnetting and VLAN awareness, multicast/IGMP, mDNS, device ... custom home automation in Utah -- over 20 years in business, more than 100 employees, and still ...
Control Systems Programmer (Crestron)
Midvale, UT · On-site
$70K - $110K/yr
Networking - DHCP & static IPs, subnetting and VLAN awareness, multicast/IGMP, mDNS, device ... custom home automation in Utah -- over 20 years in business, more than 100 employees, and still ...
$101K - $139K/yr
... for automation/device, configuration mgmt. Provision Network devices and integrate Routers ... Firewalls, IPS etc via NetBrain Perform customization of configuration, data analytics, API ...
$101K - $139K/yr
... for automation/device, configuration mgmt. Provision Network devices and integrate Routers ... Firewalls, IPS etc via NetBrain Perform customization of configuration, data analytics, API ...
Design Verification Engineer - Internal IP
Austin, TX · On-site
$120 - $160/hr
You will ensure the custom IPs powering Sohu -- including systolic arrays, DMA engines, and NoCs ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
New
Design Verification Engineer - Internal IP
Austin, TX · On-site
$120 - $160/hr
You will ensure the custom IPs powering Sohu -- including systolic arrays, DMA engines, and NoCs ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
New
Our team specializes in building cutting edge analog and mixed signal IPs that support the future ... automation to enhance efficiency are highly desirable
Our team specializes in building cutting edge analog and mixed signal IPs that support the future ... automation to enhance efficiency are highly desirable
Staff Engineer, Design Verification Engineering
Wilmington, MA · On-site
$171K - $209K/yr
... in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more ... Integrate and verify third-party and custom IPs/VIPs within subsystem-level UVM environments.
Staff Engineer, Design Verification Engineering
Wilmington, MA · On-site
$171K - $209K/yr
... in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more ... Integrate and verify third-party and custom IPs/VIPs within subsystem-level UVM environments.
Our team specializes in building cutting edge analog and mixed signal IPs that support the future ... with custom design of high-speed digital circuits with solid understanding of digital design ...
Our team specializes in building cutting edge analog and mixed signal IPs that support the future ... with custom design of high-speed digital circuits with solid understanding of digital design ...
Staff Engineer, Design Verification Engineering
Wilmington, MA · On-site
$171K - $209K/yr
... in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more ... Integrate and verify third-party and custom IPs/VIPs within subsystem-level UVM environments.
Staff Engineer, Design Verification Engineering
Wilmington, MA · On-site
$171K - $209K/yr
... in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more ... Integrate and verify third-party and custom IPs/VIPs within subsystem-level UVM environments.
Design Verification Engineer
Santa Clara, CA · On-site
$141K - $200K/yr
In this role, you will contribute to verification of next-generation interconnect and chassis IPs ... Proven ability to write clean, reusable, and maintainable verification code and automation scripts ...
Design Verification Engineer
Santa Clara, CA · On-site
$141K - $200K/yr
In this role, you will contribute to verification of next-generation interconnect and chassis IPs ... Proven ability to write clean, reusable, and maintainable verification code and automation scripts ...
Design Verification Engineer
$141K - $200K/yr
In this role, you will contribute to verification of next-generation interconnect and chassis IPs ... Proven ability to write clean, reusable, and maintainable verification code and automation scripts ...
Design Verification Engineer
$141K - $200K/yr
In this role, you will contribute to verification of next-generation interconnect and chassis IPs ... Proven ability to write clean, reusable, and maintainable verification code and automation scripts ...
... Inc Company IPS USA Requisition ID 149871BR As a Senior Consultant specializing in Atlassian ... custom fields, screen schemes, issue types, and automation rules * At least 3 years of experience ...
... Inc Company IPS USA Requisition ID 149871BR As a Senior Consultant specializing in Atlassian ... custom fields, screen schemes, issue types, and automation rules * At least 3 years of experience ...
We strive to provide advanced technology solutions through innovation in custom RISC-V Cores and AI ... Drive RTL development and integration of infrastructure IPs, including clock controllers, reset ...
We strive to provide advanced technology solutions through innovation in custom RISC-V Cores and AI ... Drive RTL development and integration of infrastructure IPs, including clock controllers, reset ...
We strive to provide advanced technology solutions through innovation in custom RISC-V Cores and AI ... Drive RTL development and integration of infrastructure IPs, including clock controllers, reset ...
We strive to provide advanced technology solutions through innovation in custom RISC-V Cores and AI ... Drive RTL development and integration of infrastructure IPs, including clock controllers, reset ...
Design Verification Engineer - Internal IP
San Jose, CA · On-site
$150K - $275K/yr
You will ensure the custom IPs powering our chips -- including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
Quick apply
Design Verification Engineer - Internal IP
San Jose, CA · On-site
$150K - $275K/yr
You will ensure the custom IPs powering our chips -- including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
Design Verification Engineer - Internal IP
Austin, TX · On-site
$120 - $170/hr
You will ensure the custom IPs powering our chips -- including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
New
Design Verification Engineer - Internal IP
Austin, TX · On-site
$120 - $170/hr
You will ensure the custom IPs powering our chips -- including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
New
Network Engineer II
La Vergne, TN · Hybrid
$100K - $120K/yr
Creates and maintains custom scripts to increase system efficiency and lower the human intervention ... Implements and utilizes configuration automation tools such as Puppet, Ansible, Chef, and SaltStack
Network Engineer II
La Vergne, TN · Hybrid
$100K - $120K/yr
Creates and maintains custom scripts to increase system efficiency and lower the human intervention ... Implements and utilizes configuration automation tools such as Puppet, Ansible, Chef, and SaltStack
Design Verification Engineer - Internal IP
San Jose, CA · On-site
$120 - $160/hr
You will ensure the custom IPs powering our chips -- including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
New
Design Verification Engineer - Internal IP
San Jose, CA · On-site
$120 - $160/hr
You will ensure the custom IPs powering our chips -- including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
New
Design Verification Engineer - Internal IP
San Jose, CA · On-site
$150K - $275K/yr
You will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
Design Verification Engineer - Internal IP
San Jose, CA · On-site
$150K - $275K/yr
You will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
You will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
You will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and ... Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows. Benefits
Ips Custom Automation Jobs Information
Meta rating
7.8
Based on 45 frontline employees who took The Breakroom Quiz
136th of 242 rated software companies
Job description
Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing in architecture, performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs designed for Meta's infrastructure. In this role, you will establish functional and performance modeling methodologies and long-term silicon roadmap strategy, as well as develop and analyze workloads, partnering with architecture, design, and software teams to ensure Meta's infrastructure silicon meets the demanding throughput, latency, and efficiency targets required at hyperscale.
ASIC Engineer, Architecture Responsibilities:
Minimum Qualifications:
Preferred Qualifications:
About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
ASIC Engineer, Architecture Responsibilities:
- Drive microarchitectural exploration and trade-off analysis across compute, memory subsystem, interconnect, and I/O domains to inform silicon architecture decisions
- Define and own the performance modeling strategy for custom infrastructure ASICs, including development of cycle-accurate and transaction-level simulation environments
- Develop and maintain C++ models of AI chip IPs and subsystems for architecture exploration, performance analysis, and software development
- Develop low-level workloads and kernels for machine learning training and inference applications
- Establish performance analysis methodologies, benchmarking frameworks, and bottleneck identification techniques across the full ASIC pipeline
- Collaborate with architecture, RTL design, and physical design teams to translate performance requirements into implementable microarchitectural specifications
- Partner with software and systems teams to co-optimize workload scheduling, firmware, and driver behavior against silicon performance characteristics
- Lead cross-functional technical reviews and communicate performance modeling results and architectural recommendations to engineering leadership
- Define long-term performance modeling infrastructure roadmaps, including tooling, automation, and simulation platform investments
- Mentor other engineers on performance modeling techniques, simulation methodology, and microarchitectural analysis best practices
- Identify and resolve performance gaps between modeled and measured silicon behavior through structured root-cause analysis and model calibration
Minimum Qualifications:
- Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 2+ years of experience in ASIC design, silicon engineering, or a related technical field
- Proficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis tools
- Experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs
- Experience with the performance analysis of data center, AI accelerator, or high-performance computing workloads on custom silicon
- Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC for complex digital systems, including processors, memory subsystems, or high-speed interconnects
- Experience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teams
- Experience with assembly programming languages, and with compiler technologies
Preferred Qualifications:
- Experience developing Python-based automation pipelines for simulation orchestration, regression testing, and performance data analysis
- Experience writing and optimizing compute/collective kernels in CUDA or equivalent GPU programming frameworks
- Familiarity with post-silicon performance validation and model-to-hardware correlation methodologies
- Experience with AI numerics, data types, math functions, and precision/accuracy analysis
- Experience with high-level synthesis, power-performance-area trade-off analysis, or PPA-driven microarchitectural optimization
- Experience building or scaling performance modeling infrastructure for hyperscale data center ASICs, including network, storage, or AI inference accelerator designs
- Experience with hardware description languages (e.g., SystemVerilog, VHDL) and simulation environments used in ASIC development flows
About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$114,000/year to $172,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$114,000/year to $172,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
About Meta
Sourced by ZipRecruiter
Industry
Internet and it, media and telecom and software development
Company size
10,000+ Employees
Headquarters location
Menlo Park, CA, US