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Verification And Validation Engineer Jobs in Portland, OR

... silicon validation software engineering or related field. Preferred Qualifications * Hands on ... Formal Method or Formal Verification technologies knowledge is a plus. * Knowledge and experience ...

New

Senior CPU Verification Engineer

Hillsboro, OR · On-site

$141K - $269K/yr

  • Medical

  • Retirement

  • PTO

No one else is obsessed with engineering and has a brighter future. Every day, we create world ... Lead, drive, develop and execute comprehensive verification plans to validate CPU logic against ...

... Validation, Power and SW teams to bring up large SoCs on emulation platform - Develop/apply ... Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM ...

... Validation, Power and SW teams to bring up large SoCs on emulation platform - Develop/apply ... Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

... Validation, Power and SW teams to bring up large SoCs on emulation platform - Develop/apply ... Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

... Validation, Power and SW teams to bring up large SoCs on emulation platform - Develop/apply ... Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM ...

Collaborate closely with Architecture, Design, DV, Silicon Validation, Power and SW teams to bring ... Develop code for Design and verification that aids with emulation activities, using Verilog/System ...

Showing results 21-40

Verification And Validation Engineer information

See Portland, OR salary details

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How much do verification and validation engineer jobs pay per hour?

As of Aug 19, 2026, the average hourly pay for verification and validation engineer in Portland, OR is $55.14, according to ZipRecruiter salary data. Most workers in this role earn between $41.83 and $67.07 per hour, depending on experience, location, and employer.

What is a verification and validation engineer?

Verification and Validation Engineers are professionals responsible for ensuring that products, systems, or software meet specified requirements and function as intended. They design and execute tests, review documentation, and analyze results to confirm that deliverables are both built correctly (verification) and serve their intended purpose (validation). Their work is crucial in highly regulated industries like aerospace, automotive, and healthcare, where safety and compliance are critical. These engineers collaborate with development teams to identify defects early and help ensure that projects meet quality standards before release.

What skills and qualifications are needed to thrive as a verification and validation engineer?

To thrive as a Verification and Validation Engineer, you need a solid background in engineering principles, software or hardware testing methodologies, and a relevant degree such as in electrical, computer, or systems engineering. Familiarity with test automation tools (e.g., Selenium, Jenkins), scripting languages, and standards like ISO or IEEE V&V processes is commonly required, along with certifications such as ISTQB. Attention to detail, analytical thinking, and strong communication skills set top performers apart by enabling thorough test coverage and clear reporting. These skills are essential to ensure products meet quality standards, regulatory requirements, and customer expectations before release.

How does a verification and validation engineer typically interact with development and QA teams during a project?

A Verification and Validation Engineer works closely with both development and QA teams to ensure that products meet specified requirements and function as intended. They often review design documents, develop test plans, and execute test cases in collaboration with developers, providing feedback on potential issues early in the process. Regular communication and coordination with QA are essential to ensure comprehensive test coverage and resolve defects efficiently. This collaborative approach helps maintain product quality and supports a smooth development lifecycle.

What is the difference between Verification And Validation Engineer vs Quality Assurance Engineer?

AspectVerification And Validation EngineerQuality Assurance Engineer
CredentialsTypically requires engineering degrees, certifications like ISTQB or ASQ CQEOften holds degrees in engineering, quality management, or related fields; certifications like Six Sigma or ISTQB
Work EnvironmentWorks in product development, testing labs, and manufacturing settingsWorks across development, production, and process improvement environments
Industry UsageCommon in electronics, aerospace, automotive, and medical device industriesWidely used in manufacturing, software, and service industries
FocusEnsures products meet specifications through testing and validationEnsures quality processes are followed to prevent defects

While both roles aim to ensure product quality, Verification And Validation Engineers focus on testing and confirming that products meet specifications, whereas Quality Assurance Engineers develop and maintain quality systems and processes to prevent defects. Both roles often collaborate but serve different stages of the product lifecycle.

Are verification and validation engineers in demand?

Verification and validation engineers are in high demand across industries such as aerospace, automotive, and software development, as companies prioritize quality assurance and regulatory compliance. These roles often require knowledge of testing methodologies, tools, and certifications, and employment opportunities are expected to grow with increased focus on product safety and reliability.

Do verification and validation engineers make good money?

Verification and validation engineers typically earn competitive salaries that vary by industry, experience, and location. They often require knowledge of testing tools, quality assurance processes, and sometimes certifications, which can influence earning potential. Overall, this role is considered well-compensated within engineering fields.

What are popular job titles related to Verification And Validation Engineer jobs in Portland, OR?

For Verification And Validation Engineer jobs in Portland, OR, the most frequently searched job titles are:

What job categories do people searching Verification And Validation Engineer jobs in Portland, OR look for?

The top searched job categories for Verification And Validation Engineer jobs in Portland, OR are:

What cities near Portland, OR are hiring for Verification And Validation Engineer jobs?

Cities near Portland, OR with the most Verification And Validation Engineer job openings:

Infographic showing various Verification And Validation Engineer job openings in Portland, OR as of August 2026, with employment types broken down into 57% Full Time, and 43% Contract. Highlights an 100% In-person job distribution, with an average salary of $114,696 per year, or $55.1 per hour.

Formal Verification Engineer

Apple Inc.

Beaverton, OR • On-site

$120 - $150/hr

Other

Posted yesterday

New


Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers


Job description

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.Work with the best Formal Verification team in the world and acquire experience being at the center of a System-on-a-chip (SoC) design verification effort collaborating with design. Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly.

Description

As a formal verification engineer working the complete formal verification for single or multiple design blocks and IP’s (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be responsible for:- Working with Apple Silicon's world-class Security Enclave design engineers to develop a formal micro-architecture specification- Developing comprehensive formal verification test plan that includes unique security requirement verification- Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture.- Crafting novel and creative solutions for modelling security attacks and proving robustness of complex design micro-architectures- Developing and implementing re-usable and optimized formal models and verification code base- Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.

Minimum Qualifications
  • A minimum of a BS degree and a minimum of 10 years of relevant industry experience in silicon validation software engineering or related field.
Preferred Qualifications
  • Hands on experience with VLSI and digital logic design and verification techniques or formal methods and their application to hardware, software, or systems
  • Interest in learning and becoming an expert in SoC, CPU, GPU, or Cellular designs
  • Detail oriented approach and desire to overcome challenges is required.
  • Formal Method or Formal Verification technologies knowledge is a plus.
  • Knowledge and experience in interpreting hardware specifications
  • Temporal logic assertion-based languages such as SVA or PSL.
  • Experience in using EDA formal tools and tool development experience is plus.
  • Proficiency in any scripting language with excellent debugging skills.
  • Excellent interpersonal skills.
  • Passionate about developing world-class/innovative formal verification solutions.
  • Exposure to CPU instruction-set architectures, memory consistency or cache coherence principles.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

Apple accepts applications to this posting on an ongoing basis.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976