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Validation Engineer Jobs in San Ramon, CA (NOW HIRING)

Etched

Power Validation Engineer

San Jose, CA · On-site

Job Summary We are looking for a Power Validation Engineer to own the end-to-end power characterization of our ASIC and the mezzanine card platform - from early silicon bring-up through production ...

Etched

Power Validation Engineer

San Jose, CA · On-site

Job Summary We are looking for a Power Validation Engineer to own the end-to-end power characterization of our ASIC and the mezzanine card platform -- from early silicon bring-up through production ...

Amazon

Sr Performance Validation Engineer

Sunnyvale, CA · On-site

As the Senior Pre-Silicon Performance Validation Engineer, you will be responsible for validating and verifying the performance of complex silicon designs during the pre-silicon phase, ensuring that ...

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Validation Engineer information

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$58

$87

How much do validation engineer jobs pay per hour?

As of Jul 18, 2026, the average hourly pay for validation engineer in San Ramon, CA is $58.11, according to ZipRecruiter salary data. Most workers in this role earn between $44.04 and $70.67 per hour, depending on experience, location, and employer.

What Is a Validation Engineer?

A validation engineer is responsible for testing equipment and electrical systems used in the manufacturing process. As a validation engineer, your primary duty is to work with the other members of the validation team to ensure that these systems measure up to company and industry standards. Skills needed for a validation engineer job include the ability to accurately test, measure, and calibrate manufacturing equipment for maximum efficiency and quality.

What is the difference between Validation Engineer vs Quality Assurance Engineer?

AspectValidation EngineerQuality Assurance Engineer
CertificationsGMP, ISO, Six SigmaISO, Six Sigma, CQA
Work EnvironmentRegulated industries like pharma, biotech, medical devicesManufacturing, software, and product development
Primary FocusEnsuring products meet specifications through validation processesPreventing defects through process and system improvements
Common UsageRegulatory compliance, validation protocolsProcess audits, quality systems

Validation Engineers focus on verifying that products and processes meet regulatory standards through validation protocols, especially in regulated industries. Quality Assurance Engineers concentrate on maintaining overall product quality by implementing and auditing quality systems. While both roles aim to ensure product safety and efficacy, Validation Engineers are more involved in validation activities, whereas QA Engineers focus on process improvement and defect prevention.

What are the key skills and qualifications needed to thrive as a Validation Engineer, and why are they important?

To thrive as a Validation Engineer, you need a solid background in engineering, quality assurance, and regulatory compliance, typically backed by a degree in engineering or a related field. Familiarity with validation protocols, statistical analysis tools, and industry-specific regulations such as FDA, GMP, or ISO standards is essential. Strong analytical thinking, attention to detail, and effective communication set top performers apart in this role. These skills ensure that products and processes meet stringent quality and safety standards, minimizing risks and ensuring regulatory approval.

What are some common challenges Validation Engineers face when working cross-functionally with other departments?

Validation Engineers frequently collaborate with teams such as manufacturing, quality assurance, and research & development. One common challenge is aligning differing priorities and timelines between departments, which can sometimes delay validation projects. Effective communication skills and flexibility are crucial to navigating these cross-functional interactions, ensuring that all regulatory and quality requirements are met without hindering production schedules. Building strong working relationships and proactively addressing potential concerns can help Validation Engineers facilitate smoother project execution.

What are Validation Engineers?

Validation Engineers are professionals responsible for ensuring that systems, processes, or equipment meet regulatory standards and function as intended. They typically work in industries such as pharmaceuticals, biotechnology, manufacturing, and medical devices. Their duties involve creating validation protocols, conducting tests, analyzing data, and documenting results to ensure compliance with industry regulations and quality standards. Validation Engineers play a critical role in maintaining product safety and efficacy, as well as helping companies pass audits and inspections.
More about Validation Engineer jobs
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What cities near San Ramon, CA are hiring for Validation Engineer jobs? Cities near San Ramon, CA with the most Validation Engineer job openings:
Validation Engineer jobs near you

Power Validation Engineer

Etched

San Jose, CA • On-site

Full-time

Medical, Dental, Vision

Re-posted 18 days ago

Job description

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are looking for a Power Validation Engineer to own the end-to-end power characterization of our ASIC and the mezzanine card platform - from early silicon bring-up through production qualification. You will design measurement methodology, build test benches, and drive findings directly into silicon, package, and system design decisions.
Key Responsibilities
  • Design and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads; characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs
  • Validate power delivery network (PDN) performance - VRM load step response, PCIe power compliance, PDN impedance - and translate measurements into actionable feedback on capacitor placement, plane geometry, and de-cap strategy for PCB and package design teams
  • Profile power transient events (ramp rates, droop amplitudes, recovery profiles) and correlate them with on-die performance monitor data; build automated power sweep frameworks exercising the full inference workload space across model sizes, batch sizes, sequence lengths, and precision modes
  • Run extended stress workloads (72 h+ continuous) to surface reliability risks and throttling behavior; instrument multi-zone thermal profiles and support our overseas partners with SLT, production and debugging.
  • Validate power sequencing, PMBus telemetry accuracy, and BMC alert thresholds across cold-start, hot-restart, and fault-injection scenarios; own power-related pass/fail criteria across FAT, SFT, and RIN qualification stages
  • Feed characterization data back to RTL and physical design teams as input for DVFS policy, clock gating coverage, and leakage optimization; write precise validation reports that enable silicon and firmware teams to act without re-running experiments
  • Lead the electrical characterization, validation, and qualification process for the on-board system-level power distribution network, spanning from power converter design to ASIC power integrity validation.
  • Provide critical support to design engineers through debug, component validation, and failure analysis for released products, independently troubleshooting and determining the root cause of electrical component defects and design flaws.
  • Develop and implement automated/scripted test procedures for the general qualification and testing of Devices Under Test (DUTs) as part of a comprehensive automation suite.
  • Collect, analyze, and aggregate test data to support data-driven engineering decisions, generate reports on findings, reduce data sets, and thoroughly investigate test outcomes down to the hardware interface or component level.
  • Collaborate with hardware designers and diagnostics development teams to understand new project architectures and system components, ensuring the necessary support for testing and debug efforts is implemented.

You may be a good fit if you have (Must-have qualifications)
  • A Bachelor's degree in Electrical Engineering or a related field. Advanced degrees or certifications in power electronics or related areas are a plus
  • Deep understanding of ASIC and system-level power delivery - VRM topology, PDN impedance, decoupling strategy, and transient response - with hands-on bench experience using precision shunts, isolated differential probes, and VNA-based PDN impedance measurement
  • Expertise with multi-phase solutions with high dynamic content and low tolerance.
  • Experience with VR tuning to a well defined power test plan to ensure VR specifications meet CPU/ ASIC
  • Demonstrated ability to design experiments that isolate root cause in a complex hardware-software stack, strong oscilloscope and lab instrument fluency (triggering on rare transient events, correlating multi-channel captures), and a track record of finding bugs that only surface under specific workload or environmental conditions
  • Relevant experience with Silicon bring ups

Strong candidates may also have experience with (Nice-to-have qualifications)
  • Masters Degree in Power Electronics
  • Experience with high voltage testing (800V and higher)
  • Prior power validation work on AI accelerators, GPUs, or high-performance server platforms, including HBM power characterization or memory power management interfaces
  • Experience with OpenBMC, IPMI, or custom BMC firmware for sensor monitoring and power capping; familiarity with LLM inference stacks (vLLM, TensorRT-LLM, or similar) sufficient to construct representative power workloads
  • Proficiency in Python for test automation, data pipeline construction, and statistical analysis; experience debugging across the stack from PMBus register dumps and BMC sensor logs to firmware traces and Linux kernel power management

Benefits
  • Medical, dental, and vision packages with generous premium coverage
    • $500 per month credit for waiving medical benefits
  • Housing subsidy of $2k per month for those living within walking distance of the office
  • Relocation support for those moving to San Jose (Santana Row)
  • Various wellness benefits covering fitness, mental health, and more
  • Daily lunch and dinner in our office
  • Unlimited compute budget subject to ROI justification

How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

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