Ucx Jobs in California (NOW HIRING)

NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. We are the GPU Communications Libraries and Networking team at NVIDIA. We deliver communication libraries like NCCL, NVSHMEM, UCX for Deep Learning and HPC. We are looking for a Distinguished Software Architect to help co‑design our next‑generation data center platforms. DL and HPC applications have a huge compute demand already and run on scales which go up to tens of thousands of GPUs. The GPUs are connected with high‑speed interconnects (eg. NVLink, PCIe) within a node and with high‑speed networking (eg. Infiniband, Ethernet) across the nodes. Communication performance between the GPUs has a direct impact on the end‑to‑end application performance; and the stakes are even higher at huge scales! This is an outstanding opportunity to push the limits on the state‑of‑the‑art and deliver platforms the world has never seen before. Are you ready to contribute to the development of innovative technologies and help realize NVIDIA's vision?

• Research new communication technologies (e.g., expand the GPUDirect technology portfolio) and design new features for our communication libraries.
• Propose innovative solutions in HW and SW for our next‑gen platforms. You will co‑design these solutions with the GPU, Networking, and SW architects and ensure seamless integration with the software stacks.
• Inspire changes based on quantitative data coming from proof‑of‑concepts or detailed technical analysis/modeling.
• Drive the adoption of new communication technologies across application verticals.
• Keep up with the latest DL research and collaborate with diverse teams (internal and external), including DL researchers and customers.

• PHD in Computer Science, Computer Engineering or a related field, or strong equivalent experience; more than 15 years of relevant experience in academia or industry.
• Expertise in HPC, parallel programming models (MPI, SHMEM), and at least one communication runtime (MPI, NCCL, NVSHMEM, OpenSHMEM, UCX, UCC), as well as computer and system architecture, GPU architecture, and CUDA.
• Deep understanding of high‑performance networking: network technologies (Infiniband, Ethernet), network design, topologies, debugging, and performance analysis.
• Strong knowledge in at least a few of the following areas: ML/DL fundamentals and their relation to communications, parallel algorithms, fault tolerance and resiliency, competitive assessment, performance analysis and optimization for parallel applications on large clusters, and developing applications using DL frameworks (PyTorch, TensorFlow).
• Programming fluency with C or C++ for systems software development.
• Ability to work and communicate effectively across different HW/SW teams and time zones.

• Industry‑recognized leader in HPC/DL communications with a history of patents, publications, conference talks, and keynotes in areas relevant to this role.
• Influential role in industry standards (e.g., MPI, OpenSHMEM) and open source software (e.g., PyTorch, UCX, Open MPI).

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 320,000 USD – 488,750 USD. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until July 7, 2026.

NVIDIA is committed to fostering an inclusive work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.