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Soc Verification Manager Jobs (NOW HIRING)

... and SoC blocks. The role focuses on building robust SystemVerilog/UVM testbenches, creating ... Automate regression and verification flows using Python, Perl, and build/test frameworks; manage ...

Own and manage testbench build flows, ensuring reproducibility, scalability, and integration with the broader verification environment. SoC Feature Implementation • Hardware Security: Implement SoC ...

Own and manage testbench build flows, ensuring reproducibility, scalability, and integration with the broader verification environment. SoC Feature Implementation Hardware Security: Implement SoC ...

Own and manage testbench build flows, ensuring reproducibility, scalability, and integration with the broader verification environment. SoC Feature Implementation · Hardware Security: Implement SoC ...

OR

$130K - $200K/yr

Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, and hardware ...

Participate in regression management, bug tracking, and documentation for design verification ... Familiarity with ARM-based SoC architectures and interconnect verification. California Pay Range ...

This is a team that works on complex IP and SoC verification using industry-leading verification ... Collaborate closely with design, architecture, and software teams to manage milestones and ...

... memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory ... verify overall SOC design. Work closely with DV methodology architects to improve verification flow.

... memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory ... verify overall SOC design. Work closely with DV methodology architects to improve verification flow.

... memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory ... verify overall SOC design. Work closely with DV methodology architects to improve verification flow.

... memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory ... verify overall SOC design. Work closely with DV methodology architects to improve verification flow.

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Soc Verification Manager information

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$35K

$81.4K

$129.5K

How much do soc verification manager jobs pay per year?

As of Jun 10, 2026, the average yearly pay for soc verification manager in the United States is $81,416.00, according to ZipRecruiter salary data. Most workers in this role earn between $62,500.00 and $97,500.00 per year, depending on experience, location, and employer.
What cities are hiring for Soc Verification Manager jobs? Cities with the most Soc Verification Manager job openings:
What states have the most Soc Verification Manager jobs? States with the most job openings for Soc Verification Manager jobs include:
Sr. Staff Engineer - Digital Design Verification

Sr. Staff Engineer - Digital Design Verification

Ambiq Micro, Inc.

Austin, TX • On-site

$134K - $164K/yr

Full-time

Posted 17 days ago


Job description

Company Overview
Ambiq is on a mission to enable intelligence everywhere - powering the AI edge revolution with the world's lowest-power semiconductor solutions.
Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.
Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.
We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.
At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.
If that's you, join us - the intelligence everywhere revolution starts here.
Responsibilities
You will be responsible for verifying complex digital designs, including Systems-on-Chip (SoCs) with multiple CPUs, digital signal processors, security hardware, interconnects, and peripheral logic supporting IoT and edge-compute applications.
The ideal candidate is a self-starter who takes full ownership of verification efforts and consistently delivers high-quality, production-ready silicon.
Key responsibilities include:
  • Own and execute end-to-end digital verification at block, sub-system, and full-chip (SoC) levels
  • Develop detailed verification plans aligned with architecture and design specifications
  • Perform SoC-level verification using full-chip simulation and regression environments
  • Architect and implement scalable, reusable UVM-based testbenches using SystemVerilog
  • Develop comprehensive test scenarios, stimulus, monitors, and checkers to achieve robust functional coverage
  • Drive constrained-random and directed testing, including scoreboarding and self-checking mechanisms
  • Develop and maintain C/C++ based verification libraries and tests for SoC-level validation
  • Automate verification flows for regressions, coverage collection, and results reporting
  • Define, track, and close functional and code coverage goals
  • Utilize advanced debugging methodologies to isolate and resolve complex design and verification issues
  • Perform root-cause analysis and collaborate closely with design teams to drive fixes
  • Ensure verification quality meets or exceeds project, schedule, and industry standards

Experience with edge-based AI inference workloads is a plus.
Requirements
  • BSEE or MSEE with 8-12 years of hands-on digital design verification experience
  • Proven track record of multiple tape-outs with silicon functioning to specification
  • Strong experience in block-level, sub-system, and full-chip SoC verification
  • Ability to define and manage verification deliverables, milestones, and schedules
  • Proactively identify verification risks and implement mitigation strategies
  • Experience working with complex SoCs integrating multiple 3rd-party IPs and VIPs
  • Strong collaboration skills to work effectively with design, architecture, and software teams
  • Excellent communication skills for reporting status, issues, and progress to stakeholders
Technical Skills
  • Design Verification:
    • SystemVerilog, UVM, Verilog
    • Functional and code coverage methodologies
    • Constrained-random verification and scoreboarding
  • SoC & Software-Based Verification:
    • C/C++ based verification in SoC environments (required)
    • Experience with processor-based systems (ARM and/or RISC-V preferred)
  • Architectures & Protocols:
    • ARM or RISC-V processor-based SoCs
    • AMBA protocols (AXI, AHB, APB)
    • DMA, flow control, and standard serial interfaces
  • Scripting & Automation:
    • Python, Perl, Makefile
  • Low Power (Digital):
    • Experience verifying low-power digital architectures and features is highly desirable
Preferred Experience
  • Security IPs (Crypto, OTP)
  • DSP and compute-heavy digital subsystems
  • High-performance or low-power SoC architectures
  • Edge AI / ML workload enablement

**Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.