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Si Software Engineer Jobs (NOW HIRING)

The Consensus

SI/PI Engineer

San Jose, CA · On-site

$2.0K/mo

We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and ... Job Summary We are looking for a Signal Integrity and Power Integrity (SI/PI) Engineer to join our ...

Etched

SI/PI Engineer

San Jose, CA · On-site

$2.0K/mo

We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and ... Job Summary We are looking for a Signal Integrity and Power Integrity (SI/PI) Engineer to join our ...

Nvidia

System Software Engineer - CUDA Chips

Santa Clara, CA · On-site

$203K - $240K/yr

Develop Software on Pre-Si environments(Simulation/Emulation) Own and drive CUDA enablement for new ... programming model, while driving development efforts across multiple teams Write effective ...

Nvidia

System Software Engineer - CUDA Chips

Santa Clara, CA · On-site

$203K - $240K/yr

Develop Software on Pre-Si environments(Simulation/Emulation) * Own and drive CUDA enablement for ... Strong C programming skills, knowledge of parallel programming * Excellent knowledge of computer ...

Raytheon

Principal Software Engineer

Fort Wayne, IN · On-site

$133K - $178K/yr

Work collaboratively with systems and SI&T engineers to analyze, implement, and test system ... Experience with software development, test, and/or integration using C, C++, Python, Ada, or ...

Raytheon Technologies

Principal Software Engineer

Wayne, IN · On-site

$119K - $160K/yr

Work collaboratively with systems and SI&T engineers to analyze, implement, and test system ... Experience with software development, test, and/or integration using C, C++, Python, Ada, or ...

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All JobsSi Software Engineer Jobs

Si Software Engineer information

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How much do si software engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for si software engineer in the United States is $147,524.00, according to ZipRecruiter salary data. Most workers in this role earn between $120,000.00 and $173,000.00 per year, depending on experience, location, and employer.

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For Si Software Engineer jobs, the most frequently searched job titles are:

Infographic showing various Si Software Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 87% Full Time, 8% Part Time, and 4% Contract. Highlights an 88% Physical, 4% Hybrid, and 8% Remote job distribution, with an average salary of $147,524 per year, or $70.9 per hour.

SI/PI Engineer

San Jose, CA • On-site

The Consensus
IT Services • 11 - 50 employees
Learn more about The Consensusexternal

$2.0K/mo

Other

Medical, Dental, Vision

Posted 9 days ago

Key responsibilities

  • Perform pre- and post-layout SI simulations for high-speed serial interfaces including PCIe Gen5/Gen6, 112G/224G Ethernet.

  • Conduct channel analysis and link budget calculations; define topology constraints, trace geometry, stack-up requirements, and via optimization guidelines for PCB designers.

  • Support bring-up, debug signal quality issues, and document root-cause findings with clear corrective actions.

Job description

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

We are looking for a Signal Integrity and Power Integrity (SI/PI) Engineer to join our platform electrical engineering team. In this role, you will own the SI/PI methodology for high-speed PCB and system designs — from early architecture through final release — ensuring electrical margins are met across interfaces running at multi-gigabit data rates.

Key Responsibilities

  • Perform pre- and post-layout SI simulations for high-speed serial interfaces including PCIe Gen5/Gen6, 112G/224G Ethernet.

  • Conduct channel analysis and link budget calculations; define topology constraints, trace geometry, stack-up requirements, and via optimization guidelines for PCB designers.

  • Develop and maintain COM, IBIS, S-parameter, and SPICE models; correlate simulation results against lab measurements.

  • Execute power delivery network (PDN) design and analysis: target impedance profiling, decoupling capacitor selection, AC/DC power analysis, and IR-drop simulation.

  • Drive DFI and design rule checks for SI/PI compliance; work with layout teams in Cadence Allegro / Sigrity or Ansys SIwave.

  • Collaborate with PCB design and layout engineers, and ASIC teams to define and review design guidelines early in the product lifecycle.

  • Support bring-up, debug signal quality issues, and document root-cause findings with clear corrective actions.

  • Develop and maintain simulation-to-hardware correlation databases to continuously improve modelling accuracy.

You may be a good fit if you have (Must-have qualifications)

  • B.S. or M.S. in Electrical Engineering or a closely related discipline.

  • 5+ years of hands-on SI/PI experience on high-speed designs (>1 Gbps serial links or DDR4/5 and HBM3/4 memory interfaces).

  • Proficiency with industry SI/PI EDA tools (Cadence Sigrity, Ansys SIwave/HFSS, Keysight ADS, or equivalent).

  • Strong understanding of transmission line theory, return-loss, insertion-loss, crosstalk, eye-diagram analysis, and jitter decomposition.

  • Experience with PDN modelling, target impedance methodology, and DC IR analysis.

  • Working knowledge of multi-layer PCB stack-up design and controlled-impedance trace routing.

  • Hands-on lab skills: S-parameter measurements with VNA, time-domain reflectometry (TDR), BERT operation, and oscilloscope probing techniques

Strong candidates may also have experience with (Nice-to-have qualifications)

  • Prior work in data center, AI/ML accelerator, networking, or high-performance computing (HPC) hardware environments.

  • Experience scripting automated SI/PI simulation flows using Python or MATLAB to reduce manual simulation turnaround time.

Benefits

  • Medical, dental, and vision packages with generous premium coverage

    • $500 per month credit for waiving medical benefits

  • Housing subsidy of $2k per month for those living within walking distance of the office

  • Relocation support for those moving to San Jose (Santana Row)

  • Various wellness benefits covering fitness, mental health, and more

  • Daily lunch and dinner in our office

  • Unlimited compute budget subject to ROI justification

How we’re different

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors. We are a fully in‑person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

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