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Senior Rfic Design Engineer Jobs in Baltimore, MD

We are looking for a Senior QPU Design Engineer to join our Processor Design team at Oxford Ionics/IonQ. In this role, you will be responsible for integrating all the features required for the ...

Roadway Design Engineer

Baltimore, MD · On-site

$85K - $115K/yr

Coordinate with project managers and senior engineers to support projects through multiple design phases (concept, preliminary engineering, and final design). * Collaborate with multidisciplinary ...

Roadway Design Engineer

Halethorpe, MD · On-site

$85K - $115K/yr

Coordinate with project managers and senior engineers to support projects through multiple design phases (concept, preliminary engineering, and final design). * Collaborate with multidisciplinary ...

Provides for the design, development and/or Implementation of engineering products, methods and ... Receives guidance from, and interfaces with, peers, senior engineers and other professional ...

Mechanical Design Engineer

Columbia, MD · On-site

$92K - $120K/yr

Provides for the design, development and/or Implementation of engineering products, methods and ... Receives guidance from, and interfaces with, peers, senior engineers and other professional ...

Lead Design Engineer

Annapolis, MD · On-site

$125K - $190K/yr

We are seeking a Lead Construction Design Engineer to develop temporary civil and structural ... senior management to identify and deliver opportunities for the development and growth of all team ...

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Senior Rfic Design Engineer information

See Baltimore, MD salary details

$70.1K

$133.7K

$193.8K

How much do senior rfic design engineer jobs pay per year?

As of Jul 9, 2026, the average yearly pay for senior rfic design engineer in Baltimore, MD is $133,721.00, according to ZipRecruiter salary data. Most workers in this role earn between $106,800.00 and $156,500.00 per year, depending on experience, location, and employer.

What is a Senior RFIC Design Engineer?

A Senior RFIC (Radio Frequency Integrated Circuit) Design Engineer is an experienced professional who designs, develops, and tests high-frequency integrated circuits used in wireless communication devices. They work extensively with analog and mixed-signal circuits, and are responsible for ensuring the performance, reliability, and manufacturability of RFICs for applications such as mobile phones, Wi-Fi, and IoT devices. In addition to technical design tasks, Senior RFIC Design Engineers often mentor junior engineers, collaborate with cross-functional teams, and contribute to the overall architecture of wireless systems.

What are the key skills and qualifications needed to thrive as a Senior RFIC Design Engineer, and why are they important?

To thrive as a Senior RFIC Design Engineer, you need deep expertise in RF circuit theory, semiconductor physics, and hands-on experience with analog/mixed-signal IC design, usually backed by a master's or PhD in electrical engineering. Mastery of industry-standard EDA tools (such as Cadence Virtuoso, Spectre, and EM simulators) and familiarity with relevant process design kits (PDKs) and lab measurement equipment is essential. Strong analytical thinking, teamwork, and effective communication set outstanding engineers apart. These skills ensure the development of high-performance, reliable RFICs through efficient problem-solving, collaboration, and precise execution in a fast-evolving field.

What is the difference between Senior Rfic Design Engineer vs RFIC Design Engineer?

AspectSenior Rfic Design EngineerRFIC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering, specialized in RFIC designBachelor's or Master's in Electrical Engineering, with RF focus
Work EnvironmentDesign teams, R&D labs, semiconductor companiesDesign teams, semiconductor firms, integrated circuit companies
Industry UsageUsed in advanced wireless, telecom, and satellite systemsUsed in wireless communication, mobile devices, and RF components

The main difference is that a Senior Rfic Design Engineer typically has more experience and leadership responsibilities in RFIC design projects, whereas an RFIC Design Engineer may be earlier in their career or at a non-senior level. Both roles focus on RF integrated circuit design but differ in seniority and scope of responsibilities.

What are some common challenges faced by Senior RFIC Design Engineers during the chip design and validation process?

Senior RFIC Design Engineers often encounter challenges such as meeting stringent performance specifications within tight power and area constraints, managing electromagnetic interference, and ensuring the design complies with fabrication process limitations. Additionally, integrating RF circuits with digital and analog components on the same chip can introduce complex noise coupling issues that must be mitigated through careful layout and simulation. Close collaboration with layout engineers, validation teams, and system architects is essential to address these challenges and to deliver robust, manufacturable designs on schedule.
What are the most commonly searched types of Rfic Design Engineer jobs in Baltimore, MD? The most popular types of Rfic Design Engineer jobs in Baltimore, MD are:
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Senior QPU Design Engineer

Oxford Ionics

College Park, MD • On-site

$126K - $181K/yr

Full-time

Medical, Dental, PTO

Posted 10 days ago


Job description

Quantum is now, and it's built here.

Oxford Ionics, now part of IonQ, is pioneering the next generation of quantum computing. Using our world-leading trapped-ion technology, we’re building the most powerful, accurate and reliable quantum systems to tackle problems that today’s supercomputers cannot solve.

Joining Oxford Ionics means becoming part of a global IonQ team that is transforming the future of quantum technology - faster, at scale, and with real world impact.

What to expect:

We are looking for a Senior QPU Design Engineer to join our Processor Design team at Oxford Ionics/IonQ. In this role, you will be responsible for integrating all the features required for the successful operation of our quantum computers into complex chips. You will be directly contributing to the team’s mission of advancing the design of high-performance quantum processing units, the novel technology that sits at the very heart of our quantum computers. You will work closely with scientists and fabrication engineers, understanding how the various parts of a chip influence and constrain each other, to bring new designs for ion trapping chips into production.

You will play an important part in shaping the hardware that supports our work in building the world’s most advanced quantum systems.

What you'll be responsible for:

In this position, your primary responsibility will focus on turning operational requirements into chip layout, supporting the effective delivery of devices that enable the use of new technologies. You will have the opportunity to expand the range of features supported by our chips, contributing directly to the success of building utility-scale quantum computers.

Key responsibilities include:

  • Guiding the end to end chip design process, from requirements to layout and tape-out.
  • Coordinating with other teams to ensure feasibility and compatibility between the various layers of the chip.
  • Collaborating with scientists to discuss their requirements and settle on specifications.
  • Laying out complex multi-layer chips, including metal track routing and interfaces with photonics and CMOS.

Requirements

To be successful in this role, you will need prior hands-on experience in chip layout, specifically translating design requirements into feature, as well as taking on layout work. We are looking for someone who can work cross-functionally to define various aspects of chip design, contributing effectively within a fast moving, highly technical team. You will need to be able to take charge of projects independently, solve problems along the way and drive the design process while taking responsibility for delivery of the final tape-out.

You'd be a great fit with:

  • At least 3 years of industry experience leading complex chip design and in IC layout.
  • A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific environment.
  • Proven ability to consult and coordinate between multiple stakeholders.
  • Strong collaboration and communication skills.

Additional experience that may be beneficial includes experience in scripted generation of layout (GSDFactory in Python or similar), using Cadence for IC layout, and experience in ion trap and/or photonics design or IC packaging.

Benefits

Be part of a team that’s shaping the future of quantum. We offer more than just a role, you’ll join a world class community of scientists, engineers and innovators working to unlock the full potential of quantum computing.

We offer a range of benefits, including opportunities to further your career alongside industry leaders, a competitive salary with IonQ stock options, an annual performance bonus, generous annual leave, flexible hybrid working, private medical and dental insurance for you and your family, and much more.

Join us and be part of the future of quantum computing.

We’re proud to be an equal opportunity employer and welcome applicants from all backgrounds.

US Salary Bandings:

$126,800 - $181,900