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Senior Physical Design Engineer Jobs in Decatur, IN

Senior FPGA Design Engineer with Security Clearance

Fort Wayne, IN · On-site

$113K - $156K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

The MPD department is seeking a Senior FPGA Design Engineer to join our team. In this role, you will leverage advanced technologies to create cutting-edge solutions for sensor and effector products.

Sr. Substation Project Engineer

Fort Wayne, IN · On-site

$88K - $113K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

ENTRUST Solutions Group is seeking a Senior Substation Engineer based near the Fort Wayne, Indiana ... Review and produce physical design drawings, including General Arrangement, Elevations and ...

MEP Senior Engineer

Fort Wayne, IN · On-site

$103K - $141K/yr

About the Role We are looking for a Senior Engineer to join our MEP team on our project in Fort ... Communicate with electrical and mechanical equipment vendors, design engineers, clients, and ...

The Data Center Engineering team takes the physical design of our data centers into the future. Our ... You generate ideas, communicate recommendations to senior-level executives and drive implementation ...

New

MEP Senior Engineer

Fort Wayne, IN · On-site

$103K - $141K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Night and swing shift differential pay for select roles About the Role We are looking for a Senior ... Communicate with electrical and mechanical equipment vendors, design engineers, clients, and ...

Description SAIC is seeking a highly experienced and motivated Senior Database Engineer with an ... convert these into physical models, and design efficient, scalable database schemas.

Showing results 21-40

Senior Physical Design Engineer information

See Decatur, IN salary details

$68K

$129.8K

$188.1K

How much do senior physical design engineer jobs pay per year?

As of Aug 18, 2026, the average yearly pay for senior physical design engineer in Decatur, IN is $129,845.00, according to ZipRecruiter salary data. Most workers in this role earn between $103,700.00 and $152,000.00 per year, depending on experience, location, and employer.

What is a senior physical design engineer?

A Senior Physical Design Engineer is a highly skilled professional in the field of semiconductor engineering who specializes in transforming circuit designs (netlists) into physical layouts for integrated circuits (ICs). They are responsible for tasks such as floorplanning, placement, clock tree synthesis, and routing, ensuring that the chip meets performance, area, and power requirements. Senior engineers in this role often lead projects, mentor junior engineers, and collaborate closely with other design and verification teams to deliver high-quality silicon products.

What are the key skills and qualifications needed to thrive as a senior physical design engineer?

To thrive as a Senior Physical Design Engineer, you need expertise in VLSI design, ASIC/SoC implementation, and a solid background in electrical or computer engineering, often complemented by a relevant degree. Mastery of EDA tools such as Cadence, Synopsys, or Mentor Graphics, and familiarity with scripting languages like TCL and Python, is typically required. Strong problem-solving abilities, attention to detail, and effective communication are critical soft skills for collaborating with cross-functional teams and managing complex projects. These skills and qualifications ensure efficient, high-quality chip design, meeting both technical and timeline requirements in a competitive industry.

What are some common challenges faced by senior physical design engineers during the chip tape-out phase?

Senior Physical Design Engineers often encounter tight deadlines and last-minute design changes during the chip tape-out phase, which can make ensuring timing closure and meeting power, performance, and area (PPA) targets particularly challenging. Collaborating closely with verification and layout teams is essential to quickly resolve any critical design rule violations or integration issues. Effective communication, attention to detail, and thorough knowledge of EDA tools are key to successfully managing these high-pressure situations and delivering a manufacturable design on schedule.

What is the difference between Senior Physical Design Engineer vs Physical Design Engineer?

AspectSenior Physical Design EngineerPhysical Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience in physical design toolsBachelor's or Master's in Electrical Engineering or Computer Engineering; entry to mid-level experience
Work EnvironmentDesign teams in semiconductor or chip design companies, using EDA toolsDesign teams in semiconductor or chip design companies, using EDA tools
Employer & Industry UsageCommonly employed in advanced chip design companies, focusing on complex ICsUsed across various semiconductor companies for standard physical design tasks

The main difference is experience level and responsibility. Senior Physical Design Engineers typically lead complex projects and mentor junior staff, while Physical Design Engineers focus on executing design tasks under supervision. Both roles require similar technical skills and work in similar environments, but the senior role involves more leadership and strategic planning.

How much does a senior physical design engineer make in the US?

A senior physical design engineer in the US typically earns between $110,000 and $160,000 annually, depending on experience, location, and company size. Compensation may also include bonuses and stock options, especially in high-tech industries or large corporations.
Infographic showing various Senior Physical Design Engineer job openings in Decatur, IN as of August 2026, with employment types broken down into 1% As Needed, 72% Full Time, 21% Part Time, 1% Temporary, 4% Contract, and 1% Nights. Highlights an 95% Physical, 1% Hybrid, and 4% Remote job distribution, with an average salary of $129,845 per year, or $62.4 per hour.

Senior FPGA Design Engineer with Security Clearance

RTX

Fort Wayne, IN • On-site

$113K - $156K/yr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 24 days ago


RTX rating

8.2

Company rating: 8.2 out of 10

Based on 86 frontline employees who took The Breakroom Quiz

39th of 72 rated aerospace companies


Job description

Date Posted:
2026-06-24
Country:
United States of America Location:
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A Position Role Type:
Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance Security Clearance Type: DoD Clearance: Secret Security Clearance Status: Active and existing security clearance required after day 1 At Raytheon, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today's mission and stay ahead of tomorrow's threat. Our team solves tough, meaningful problems that create a safer, more secure world. The Multi-Product Power & Digital (MPD) department designs FPGAs, circuit cards, and electronics subassemblies for a range of products including missiles/effectors, radars, and electronic warfare systems. The team leverages digital, analog, and power design skills to provide support throughout the product lifecycle from architecture and design through production and sustainment. The MPD department is seeking a Senior FPGA Design Engineer to join our team. In this role, you will leverage advanced technologies to create cutting-edge solutions for sensor and effector products. You will partner with experienced, multidisciplinary teams to define requirements, develop architectures, execute detailed design and simulations, and perform integration and verification tasks. You will document your designs within the appropriate configuration management tools and provide comprehensive engineering support throughout the product lifecycle. This position is an onsite role, located in Fort Wayne, IN. What You Will Do * Provide full lifecycle support of production quality FPGA designs for all major vendors and device families including: AMD (Xilinx), Altera, and Microchip (Microsemi) using tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.
* Generate FPGA designs for the following applications: gigabit serial interfaces, Radio Frequency (RF) DSP, controls, data links, embedded processing and processor interfaces.
* Support translation of system level requirements into FPGA requirements
* Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)
* Lead FPGA designs and code in VHDL for reliability and maintainability
* Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage
* Define schedules for FPGA tasking and drive execution to the planned budget and schedule.
* Create complete documentation including requirements, verification plan, and user's guides
* Lead individual designs and/or small teams.
* Operate with minimal oversight from manager.
* Support internal and external technical reviews.
* Engage in knowledge transfer activities and mentorship of junior engineers. Qualifications You Must Have * Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 5 years of prior relevant experience.
* Experience to include one or more of the following: * FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
* Experience with AMD (Xilinx), Altera and/or Microchip (Microsemi) devices and with tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.
* Hands on experience with integration and debug of FPGA/ASIC in a lab environment
* Experience with timing closure, clock domain crossing and reset domain crossing analysis, and constraint development.
* Experience with source code management, design reviews, and code release in a team development environment. Qualifications We Prefer * One or more advanced degrees in Electrical Engineering or a related Science, Technology, Engineering, or Mathematics (STEM) major. A suitable degree may be counted as 2 years of work experience."
* FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
* Image processing techniques for visual and infrared sensors
* Embedded systems design using ARM, Microblaze, or NIOS processors
* Gigabit serial interfaces and multi-gigabit transceivers (MGTs)
* Constrained random verification in UVM using System Verilog
* Experience with High Level Synthesis (HLS)
* Experience with vector processors and/or GPUs
* Demonstrated ability to lead teams to achieve schedule, budget and technical commitments.
* Experience with project management tools such as Earned Value and/or Agile Execution.
* Proposal development experience. What We Offer Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Trust, Respect, Accountability, Collaboration, and Innovation. This position offers relocation based on candidate eligibility. Learn More & Apply Now! This position requires a security clearance. DCSA Consolidated Adjudication Services (DCSA CAS), an agency of the Department of Defense, handles and adjudicates the security clearance process. More information about Security Clearances can be found on the US Department of State government website here: https://www.state.gov/m/ds/clearances/c10978.htm Indiana: https://careers.rtx.com/global/en/raytheon-indiana-location #LI-CV1 As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote. The salary range for this role is 86,800 USD - 165,200 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate's work experience, location, education/training, and key skills. Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement. Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company's performance. This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply. RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window. RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans' Readjustment Assistance Act. Privacy Policy and Terms: Click on this link to read the Policy and Terms

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