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Senior Physical Design Engineer Jobs in Arizona (NOW HIRING)

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Sr Mechanical Design Engineer

Phoenix, AZ · On-site

$89K - $123K/yr

Senior Mechanical Design Engineer Job Summary The Senior Mechanical Design Engineer is responsible for leading the design, development, validation, and continuous improvement of mechanical products ...

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Sr Mechanical Design Engineer

Phoenix, AZ · On-site

$89K - $123K/yr

Senior Mechanical Design Engineer Job Summary The Senior Mechanical Design Engineer is responsible for leading the design, development, validation, and continuous improvement of mechanical products ...

Physical Verification Engineer

Phoenix, AZ · On-site

$135K/yr

... design ecosystem, and an operationally resilient global manufacturing supply chain. Position Overview The Aerospace, Defense & Government (ADG) Senior Physical Verification Application Engineer ...

Physical Verification Engineer

Phoenix, AZ · On-site

$128.88 - $245.16/hr

... design ecosystem, and an operationally resilient global manufacturing supply chain.**Position Overview**The Aerospace, Defense & Government (ADG) Senior Physical Verification Application Engineer ...

... design ecosystem, and an operationally resilient global manufacturing supply chain. Position Overview The Aerospace, Defense & Government (ADG) Senior Physical Verification Application Engineer ...

IC Packaging Design Engineer

Chandler, AZ · On-site

$138K/yr

Develop and implement physical design and layout solutions for advanced IC packages. * Perform ... Senior-Level: 10+ years of experience in IC packaging and package design. * Mid-Level: 4-6 years of ...

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Senior Physical Design Engineer information

See Arizona salary details

$65.7K

$125.4K

$181.7K

How much do senior physical design engineer jobs pay per year?

As of Sep 5, 2026, the average yearly pay for senior physical design engineer in Arizona is $125,411.00, according to ZipRecruiter salary data. Most workers in this role earn between $100,200.00 and $146,800.00 per year, depending on experience, location, and employer.

What is a senior physical design engineer?

A Senior Physical Design Engineer is a highly skilled professional in the field of semiconductor engineering who specializes in transforming circuit designs (netlists) into physical layouts for integrated circuits (ICs). They are responsible for tasks such as floorplanning, placement, clock tree synthesis, and routing, ensuring that the chip meets performance, area, and power requirements. Senior engineers in this role often lead projects, mentor junior engineers, and collaborate closely with other design and verification teams to deliver high-quality silicon products.

What are the key skills and qualifications needed to thrive as a senior physical design engineer?

To thrive as a Senior Physical Design Engineer, you need expertise in VLSI design, ASIC/SoC implementation, and a solid background in electrical or computer engineering, often complemented by a relevant degree. Mastery of EDA tools such as Cadence, Synopsys, or Mentor Graphics, and familiarity with scripting languages like TCL and Python, is typically required. Strong problem-solving abilities, attention to detail, and effective communication are critical soft skills for collaborating with cross-functional teams and managing complex projects. These skills and qualifications ensure efficient, high-quality chip design, meeting both technical and timeline requirements in a competitive industry.

What are some common challenges faced by senior physical design engineers during the chip tape-out phase?

Senior Physical Design Engineers often encounter tight deadlines and last-minute design changes during the chip tape-out phase, which can make ensuring timing closure and meeting power, performance, and area (PPA) targets particularly challenging. Collaborating closely with verification and layout teams is essential to quickly resolve any critical design rule violations or integration issues. Effective communication, attention to detail, and thorough knowledge of EDA tools are key to successfully managing these high-pressure situations and delivering a manufacturable design on schedule.

What is the difference between Senior Physical Design Engineer vs Physical Design Engineer?

AspectSenior Physical Design EngineerPhysical Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience in physical design toolsBachelor's or Master's in Electrical Engineering or Computer Engineering; entry to mid-level experience
Work EnvironmentDesign teams in semiconductor or chip design companies, using EDA toolsDesign teams in semiconductor or chip design companies, using EDA tools
Employer & Industry UsageCommonly employed in advanced chip design companies, focusing on complex ICsUsed across various semiconductor companies for standard physical design tasks

The main difference is experience level and responsibility. Senior Physical Design Engineers typically lead complex projects and mentor junior staff, while Physical Design Engineers focus on executing design tasks under supervision. Both roles require similar technical skills and work in similar environments, but the senior role involves more leadership and strategic planning.

How much does a senior physical design engineer make in the US?

A senior physical design engineer in the US typically earns between $110,000 and $160,000 annually, depending on experience, location, and company size. Compensation may also include bonuses and stock options, especially in high-tech industries or large corporations.

What are the most commonly searched types of Physical Design Engineer jobs in Arizona?

The most popular types of Physical Design Engineer jobs in Arizona are:

What are popular job titles related to Senior Physical Design Engineer jobs in Arizona?

For Senior Physical Design Engineer jobs in Arizona, the most frequently searched job titles are:

What cities in Arizona are hiring for Senior Physical Design Engineer jobs?

Cities in Arizona with the most Senior Physical Design Engineer job openings:

Infographic showing various Senior Physical Design Engineer job openings in Arizona as of August 2026, with employment types broken down into 1% As Needed, 79% Full Time, 16% Part Time, 3% Contract, and 1% Nights. Highlights an 96% Physical, 2% Hybrid, and 2% Remote job distribution, with an average salary of $125,411 per year, or $60.3 per hour.

Physical Design Engineering Graduate Intern

Intel

Phoenix, AZ • On-site

$89K - $121K/yr

Full-time

Medical, Retirement, PTO

Posted 21 days ago


Key responsibilities

  • Support physical design implementation processes, including synthesis, place-and-route, timing analysis, clocking, and/or integration.

  • Assist in verification and signoff activities to ensure manufacturability and performance compliance of silicon designs.

  • Collaborate with cross-functional teams to enhance design scalability and automation efforts.


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

18th of 161 rated electronics manufacturers


Job description

Job Details:Job Description: 

The Role and Impact:
Join Intel as a Physical Design Engineering Graduate Intern and contribute to shaping the future of silicon innovation. This hands-on role is an exciting opportunity to be part of the physical implementation of state-of-the-art silicon designs that power Intel's cutting-edge technologies. You will work with a multidisciplinary team to optimize designs for manufacturability and performance, while developing critical skills and exploring pathways for career growth. As an intern, you will make impactful contributions to Intel's business goals and gain invaluable experience in a highly collaborative and learning-oriented environment.

Key Responsibilities:

  • Support physical design implementation processes, including synthesis, place-and-route, timing analysis, clocking, and/or integration.
  • Assist in verification and signoff activities to ensure manufacturability and performance compliance of silicon designs.
  • Collaborate with cross-functional teams to enhance design scalability and automation efforts.
  • Apply design optimization techniques to improve power, performance, and area efficiency in silicon designs.
  • Perform floor planning and clock tree synthesis to achieve robust physical designs.
  • Contribute to static timing analysis to meet critical timing constraints for manufacturability.
  • Explore innovative solutions for low-power design and power reduction strategies in physical design workflows.
  • Embrace continuous learning and problem-solving to support Intel's commitment to advancing technology leadership
Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Currently pursuing a master's degree in electrical engineering or computer engineering, or a related technical specialized field.

3+ months of experience with the following skills:

  • Proficiency in physical design tools and flows, including design planning tools, floor planning, and static timing analysis.
  • Knowledge of low-power design techniques and power reduction methodologies.
  • Familiarity with clock tree synthesis and design optimization principles.
    Demonstrated ability to analyze and solve complex technical problems.

Preferred Qualifications:

  • Strong communication and collaboration skills to work effectively in cross-functional teams.
  • Eagerness to explore and learn about design scalability, automation, and innovative approaches to physical design challenges.
  • Passion for continuous improvement and self-driven development in a dynamic environment.
  • Ability to adapt to new tools, techniques, and industry trends in silicon design.

We welcome applicants who are excited to contribute their expertise to Intel's success. Join us and begin your journey toward building a meaningful career in physical design engineering

Job Type:Student / InternShift:Shift 1 (United States of America)Primary Location: US, California, FolsomAdditional Locations:US, Arizona, Phoenix, US, California, Santa ClaraPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $89,900.00-121,600.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968