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Senior Memory Design Engineer Jobs in Massachusetts

HPR

Senior FPGA Design Engineer

Needham, MA

$159K - $215K/yr

As a Senior FPGA Design Engineer at HPR, you will: * Design, develop, optimize, and maintain high-performance FPGA compute and networking systems used in electronic trading * Own the RTL design ...

HPR

Senior FPGA Design Engineer

Needham, MA · On-site

$159K - $215K/yr

As a Senior FPGA Design Engineer at HPR, you will: * Design, develop, optimize, and maintain high-performance FPGA compute and networking systems used in electronic trading * Own the RTL design ...

Wozny-Barbar & Associates Inc

Be Seen First

Senior Mechanical Design Engineer

Hanover, MA · On-site

$90K - $130K/yr

We are presently seeking a Senior Mechanical Design Engineer: The Mechanical Design Engineer is responsible for producing high -quality CADD/Revit drawings and supporting the full design process from ...

Wozny-Barbar & Associates Inc

Be Seen First

Senior Mechanical Design Engineer

Hanover, MA · On-site

$90K - $130K/yr

We are presently seeking a Senior Mechanical Design Engineer: The Mechanical Design Engineer is responsible for producing high -quality CADD/Revit drawings and supporting the full design process from ...

Myomo, Inc

Sr. Mechanical Design Engineer

Burlington, MA · On-site

$130K - $140K/yr

Sr. Mechanical Design Engineer Department: Engineering Employment Type: Full Time Location: Burlington, MA Compensation: $130,000 - $140,000 / year Description Why should you join our success story?

Teradyne

RTL Design Engineer

Reading, MA · On-site

$123K - $196K/yr

... Engineering or related field with 5+ years of experience. * Extensive logic design experience ... Experience with high speed memory and serial * Experience with automation through scripting such as ...

Raytheon

Senior Mechanical Design Engineer

Marlborough, MA

$93K - $128K/yr

This Senior Mechanical Engineer is an on-site role in Marlborough, MA or Tewksbury, MA. What You Will Do * Utilizing mechanical hardware design experience and knowledge with ruggedized structures ...

Teradyne

RTL Design Engineer

North Reading, MA · On-site

$123K - $196K/yr

... Engineering or related field with 5+ years of experience. * Extensive logic design experience ... Experience with high speed memory and serial * Experience with automation through scripting such as ...

Raytheon

Senior Mechanical Design Engineer

Marlborough, MA

$93K - $128K/yr

This Senior Mechanical Engineer is an on-site role in Marlborough, MA or Tewksbury, MA. What You Will Do * Utilizing mechanical hardware design experience and knowledge with ruggedized structures ...

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All JobsMemory Design Engineer JobsSenior Memory Design Engineer JobsSenior Memory Design Engineer Jobs in Massachusetts

Senior Memory Design Engineer information

What are the key skills and qualifications needed to thrive as a senior memory design engineer?

To thrive as a Senior Memory Design Engineer, you need a deep understanding of semiconductor physics, circuit design, and memory architectures, usually backed by a degree in electrical engineering or a related field. Familiarity with EDA tools like Cadence or Synopsys, as well as experience with simulation, verification, and layout tools, is typically required. Strong problem-solving abilities, attention to detail, and effective communication are vital soft skills for collaborating with cross-functional teams and troubleshooting complex issues. These skills and qualifications are essential to ensure reliable, high-performance memory solutions that meet strict design specifications and industry standards.

What is a senior memory design engineer?

Senior Memory Design Engineers are experienced professionals who specialize in designing, developing, and optimizing memory components such as SRAM, DRAM, or non-volatile memory for integrated circuits. They work on the architecture, circuit design, verification, and testing of memory systems to meet performance, power, and reliability requirements. These engineers often lead technical teams, contribute to design methodologies, and collaborate with cross-functional teams to ensure successful product development and manufacturing.

What are some common challenges faced by senior memory design engineers in cross-functional project teams?

Senior Memory Design Engineers often collaborate with teams from digital, analog, verification, and process technology groups. A common challenge is ensuring that memory designs meet performance, power, and area requirements while staying compatible with evolving process technologies. Balancing tight project timelines with the need for thorough validation and addressing unexpected silicon issues can also be demanding. Effective communication and proactive problem-solving are essential, as decisions made in memory design can significantly impact overall chip performance and yield.

What is the difference between Senior Memory Design Engineer vs Memory Design Engineer?

AspectSenior Memory Design EngineerMemory Design Engineer
QualificationsBachelor's/Master's in Electrical Engineering or related field, experience preferredBachelor's or higher in Electrical Engineering or related field
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
ResponsibilitiesLeading memory architecture, complex circuit design, mentoringMemory circuit design, simulation, testing

The main difference is experience level and responsibility. Senior Memory Design Engineers typically lead projects and mentor junior staff, while Memory Design Engineers focus on executing design tasks. Both roles require similar technical skills and work in comparable environments within the semiconductor industry.

What cities in Massachusetts are hiring for Senior Memory Design Engineer jobs? Cities in Massachusetts with the most Senior Memory Design Engineer job openings:
Senior Memory Design Engineer jobs near you

DFT Design Engineer

Advanced Micro Devices, Inc

Boxborough, MA • On-site

$126K/yr

Full-time

Re-posted 26 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 156 rated electronics manufacturers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
As a Design-for-Testability (DFT) Engineer at AMD, you will own the full DFT lifecycle-from specification definition through post-silicon bring-up-to ensure robust and efficient test solutions. You will collaborate closely with Architects, Verification Engineers, Physical Designers, CAD Engineers, SoC Design Engineers, Product Engineers, and Program Management to deliver successful and timely project outcomes.
THE PERSON:
As part of AMD's Strategic Silicon Solutions (S3) Business Unit, you will help bring customer-specific design requirements to life across a wide range of products, including tablets, gaming consoles, servers, and more. You thrive in a collaborative team environment, take ownership of tasks through to completion, and communicate effectively both verbally and in writing.
KEY RESPONSIBILITIES:
  • Implement and verify DFT and Design-for-Debug (DFD) architectures and features.
  • Insert Scan, JTAG, and Boundary Scan chains; generate ATPG patterns.
  • Generate, implement, and verify Memory Built-In Self-Test (BIST) logic.
  • Apply low power DFT techniques to designs.
  • Achieve DFT timing closure and verify ATPG patterns through gate-level simulation with timing.
  • Analyze test coverage and work on reducing test costs.
  • Provide post-silicon support to ensure successful bring-up and improve yield learning.

PREFERRED EXPERIENCE:
  • Strong understanding of Design For Test methodologies and DFT verification (e.g., IEEE1500, JTAG 1149.x, scan, memory BIST).
  • Experience with Tessent TestKompress and Silicon Scan Network (SSN).
  • Proficiency with VCS simulation tools, Perl/Shell scripting, and Verilog RTL design.
  • Exposure to static timing analysis and timing closure processes.
  • Experience in pre-silicon test planning, validation, and engagement with design teams.
  • Skilled in characterization and debugging of scan/ATPG tests in new silicon designs and process technologies.
  • Expertise in optimizing test flows for quality enhancement and cost reduction.
  • Ability to analyze part failures to improve test coverage and yield.
  • Experience analyzing characterization data across process, voltage, and temperature (PVT) corners.
  • Excellent communication skills and ability to work effectively in a global team environment.
  • Knowledge of low power design concepts such as clock gating and power gating is a plus.

ACADEMIC CREDENTIALS:
  • Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related field.

LOCATIONS: Boxborough, MA
This role is not eligible for Visa Sponsorship.
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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