Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Quick apply
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Quick apply
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Redlands, CA · On-site
$123K - $202K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Our tools support complex real-life workflows in 2D & 3D for raster / image processing and analysis. If you are excited about user interaction and user interface development, then join our creative ...
Redlands, CA · On-site
$123K - $202K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Our tools support complex real-life workflows in 2D & 3D for raster / image processing and analysis. If you are excited about user interaction and user interface development, then join our creative ...
Redlands, CA · On-site
$123K - $202K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Our tools support complex real-life workflows in 2D & 3D for raster / image processing and analysis. If you are excited about user interaction and user interface development, then join our creative ...
Redlands, CA · On-site
$123K - $202K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Our tools support complex real-life workflows in 2D & 3D for raster / image processing and analysis. If you are excited about user interaction and user interface development, then join our creative ...
Irvine, CA · On-site
$130K - $160K/yr
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Irvine, CA · On-site
$130K - $160K/yr
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Quick apply
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Irvine, CA · On-site
$130K - $160K/yr
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Irvine, CA · On-site
$130K - $160K/yr
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Irvine, CA · On-site
$130K - $160K/yr
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Irvine, CA · On-site
$130K - $160K/yr
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
$130K - $160K/yr
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
$130K - $160K/yr
Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs * Integrate and validate ...
Irvine, CA · On-site
$140K - $170K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... image/video. The Sr Engineer, AI & ML will also closely work with our software, hardware and ... At least 3+ years of experience in AI/ML, statistical signal processing, and deep learning ...
Irvine, CA · On-site
$140K - $170K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... image/video. The Sr Engineer, AI & ML will also closely work with our software, hardware and ... At least 3+ years of experience in AI/ML, statistical signal processing, and deep learning ...
Irvine, CA · On-site
$140K - $170K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... image/video. The Sr Engineer, AI & ML will also closely work with our software, hardware and ... At least 3+ years of experience in AI/ML, statistical signal processing, and deep learning ...
Irvine, CA · On-site
$140K - $170K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... image/video. The Sr Engineer, AI & ML will also closely work with our software, hardware and ... At least 3+ years of experience in AI/ML, statistical signal processing, and deep learning ...
Irvine, CA · On-site
$140K - $170K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... image/video. The Sr Engineer, AI & ML will also closely work with our software, hardware and ... At least 3+ years of experience in AI/ML, statistical signal processing, and deep learning ...
Irvine, CA · On-site
$140K - $170K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... image/video. The Sr Engineer, AI & ML will also closely work with our software, hardware and ... At least 3+ years of experience in AI/ML, statistical signal processing, and deep learning ...
Irvine, CA · On-site
$120K - $150K/yr
Primarily responsible for sensor timing control design and Image Signal Processing (ISP) system level integration. * Actively participate in chip level architecture definition, including analog ...
Irvine, CA · On-site
$120K - $150K/yr
Primarily responsible for sensor timing control design and Image Signal Processing (ISP) system level integration. * Actively participate in chip level architecture definition, including analog ...
Primarily responsible for sensor timing control design and Image Signal Processing (ISP) system level integration. * Actively participate in chip level architecture definition, including analog ...
Quick apply
Primarily responsible for sensor timing control design and Image Signal Processing (ISP) system level integration. * Actively participate in chip level architecture definition, including analog ...
Irvine, CA · On-site
$120K - $150K/yr
Primarily responsible for sensor timing control design and Image Signal Processing (ISP) system level integration. * Actively participate in chip level architecture definition, including analog ...
Irvine, CA · On-site
$120K - $150K/yr
Primarily responsible for sensor timing control design and Image Signal Processing (ISP) system level integration. * Actively participate in chip level architecture definition, including analog ...
Irvine, CA · On-site
$120K - $150K/yr
Primarily responsible for sensor timing control design and Image Signal Processing (ISP) system level integration. * Actively participate in chip level architecture definition, including analog ...
Irvine, CA · On-site
$120K - $150K/yr
Primarily responsible for sensor timing control design and Image Signal Processing (ISP) system level integration. * Actively participate in chip level architecture definition, including analog ...
Santa Ana, CA · On-site
$111K - $145K/yr
You will triage product failures, drive root cause investigations to closure through process or ... and SEM image analysis * Ability to read and interpret schematics and apply best practices ...
Santa Ana, CA · On-site
$111K - $145K/yr
You will triage product failures, drive root cause investigations to closure through process or ... and SEM image analysis * Ability to read and interpret schematics and apply best practices ...
Irvine, CA · On-site
$103K - $158K/yr
Utilizing the standardized Risk Operation processes, support governance activities, including ... Base image selection and hardening * Patch and dependency management * Runtime security ...
Quick apply
Irvine, CA · On-site
$103K - $158K/yr
Utilizing the standardized Risk Operation processes, support governance activities, including ... Base image selection and hardening * Patch and dependency management * Runtime security ...
Irvine, CA · On-site
$63 - $84.25/hr
Utilizing the standardized Risk Operation processes, support governance activities, including ... Base image selection and hardening * Patch and dependency management * Runtime security ...
Irvine, CA · On-site
$63 - $84.25/hr
Utilizing the standardized Risk Operation processes, support governance activities, including ... Base image selection and hardening * Patch and dependency management * Runtime security ...
Irvine, CA · On-site
$103K - $158K/yr
Utilizing the standardized Risk Operation processes, support governance activities, including ... Base image selection and hardening * Patch and dependency management * Runtime security ...
Irvine, CA · On-site
$103K - $158K/yr
Utilizing the standardized Risk Operation processes, support governance activities, including ... Base image selection and hardening * Patch and dependency management * Runtime security ...
Riverside, CA · On-site
$26 - $30/hr
POSITION SUMMARY The Senior Admissions Rep is responsible for all phases of the Admissions process ... Ability to project a professional image over the phone and in writing. * Must speak well, and be ...
Riverside, CA · On-site
$26 - $30/hr
POSITION SUMMARY The Senior Admissions Rep is responsible for all phases of the Admissions process ... Ability to project a professional image over the phone and in writing. * Must speak well, and be ...
$26.1K - $39.2K
14% of jobs
$45.8K is the 25th percentile. Wages below this are outliers.
$39.2K - $52.4K
22% of jobs
$52.4K - $65.5K
9% of jobs
The median wage is $74.9K / yr.
$65.5K - $78.6K
7% of jobs
$78.6K - $91.8K
12% of jobs
$102.4K is the 75th percentile. Wages above this are outliers.
$91.8K - $104.9K
14% of jobs
$104.9K - $118K
9% of jobs
$118K - $131.2K
4% of jobs
$131.2K - $144.3K
3% of jobs
$144.3K - $157.4K
4% of jobs
$157.4K - $170.6K
2% of jobs
$26.1K
$83.8K
$170.6K
| Aspect | Senior Image Processing | Image Analyst |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Computer Science, Electrical Engineering, or related field; experience with image processing software | Bachelor's or Master's in Computer Science, Remote Sensing, or related field; knowledge of image analysis tools |
| Work Environment | Research labs, tech companies, or manufacturing settings | Government agencies, defense, or environmental organizations |
| Employer & Industry Usage | Tech firms, healthcare, manufacturing | Defense, remote sensing, environmental monitoring |
While both roles involve working with images, Senior Image Processing focuses on developing and optimizing image processing algorithms and software, often in technical or R&D settings. Image Analysts interpret and analyze images for specific insights, typically in fields like defense or environmental monitoring. The roles overlap in technical skills but differ in primary responsibilities and work environments.
The top searched job categories for Senior Image Processing jobs in Riverside, CA are:
Cities near Riverside, CA with the most Senior Image Processing job openings:
Sourced by ZipRecruiter
Software development
1,001 - 5,000 Employees
Santa Clara, CA, US
1995