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Senior Fpga Jobs in Riverside, CA (NOW HIRING)

Senior Electronics Engineer

Irvine, CA · On-site

$120K - $135K/yr

A Day in Your Life at MKS: As a Senior Electronics Engineer at MKS, you will work with ... Exposure to FPGA technologies is beneficial but not required. Compensation and Benefits: Salary Pay ...

Senior Electrical Engineer

Irvine, CA · On-site

$115K - $150K/yr

We are looking for a Senior Electrical Engineer to join our rapidly growing team in Irvine, CA ... Familiarity with common MCU, CPU, FPGA devices and technologies. * Knowledge of modern analog and ...

Senior ASIC DV Engineer

Irvine, CA · On-site

$141K - $226K/yr

Writing diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. * Replicating silicon bugs in simulation environments and validating fixes or SW workarounds. * Converting verification ...

Sr. Power Electronics Engineer

Foothill Ranch, CA · On-site

$115K - $136K/yr

FPGA based control algorithm development * Knowledge of LabVIEW is a plus but not essential Other ... the position offered (non-Sr., Sr., Lead or Manager). The range is $130,000 to $160,000.

Showing results 21-40

Senior Fpga information

What is the difference between Senior Fpga vs FPGA Engineer?

AspectSenior FPGAFPGA Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, experience in FPGA designBachelor's or higher in Electrical Engineering or related field, FPGA design experience
Work EnvironmentDesign teams in aerospace, defense, telecommunications, often leading projectsDesign and develop FPGA solutions within engineering teams, typically focused on specific projects
Employer & Industry UsageUsed in industries requiring advanced FPGA design and leadership rolesCommonly employed in industries like electronics, telecommunications, and embedded systems

While both roles involve FPGA design, a Senior FPGA typically has more experience, leadership responsibilities, and may oversee projects, whereas an FPGA Engineer focuses on developing FPGA solutions within a team. The Senior FPGA often requires more advanced credentials and industry experience.

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Sr. DSP Systems Engineer (Silicon Engineering)

United States Digital Space LLC

Irvine, CA • On-site

$165 - $265/hr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Posted yesterday

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Job description

the company was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today the company is actively developing the technologies to make this possible, with the ultimate goal ofenabling human life on Mars.

SR. DSP SYSTEMS ENGINEER (SILICON ENGINEERING)

At the company we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting‑edge next‑generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting‑edge solutions that will expand the performance and capabilities of the Starlink network.

RESPONSIBILITIES
  • Drive program‑level decisions on sensor firmware, software, and AI‑driven architecture for large‑scale RF sensing and satellite broadband systems
  • Research and develop novel solutions incorporating advanced digital beamforming, massive MIMO, and direct‑to‑device technologyfor on‑orbit and ground‑based applications
  • Design, model, and test algorithms for system‑level and link‑level performance, including floating‑point/fixed‑point simulations of modem, beamforming, and sensor data processing
  • Work in close collaboration with ASIC/FPGA, RF/antenna, and software engineers to design, validate, and bring up silicon‑based RF sensing and communication systems
  • Generate spacecraft/consumer equipment specifications, requirements, test procedures, and bit‑/cycle‑accurate vectors; support silicon bring‑up, on‑orbit demonstrations, and system validation
  • Analyze overall system performance (including link budgets, impairments, and multi‑access schemes) and implement system test plans under dynamic program needs
BASIC QUALIFICATIONS
  • Bachelor’s degree in computer science, electrical/computer engineering, physics, math, or other STEM discipline
  • 5+ years of experience in system‑level modeling, digital signal processing, or RF/wireless system design
PREFERRED SKILLS AND EXPERIENCE
  • Master’s degree in electrical engineering with emphasis in communication systems, digital signal processing, or related fields
  • Experience with AI‑driven architecture, advanced digital beamforming, massive MIMO, and direct‑to‑device technologies
  • Professional experience working on RF sensors or wireless modems
  • Experience modeling RF and channel impairments (multipath, phase noise, group delay, fading, nonlinear distortion) and building system‑level simulators
  • Expertise in multiple access schemes (TDMA, CDMA, OFDMA), high‑data‑rate modem design/verification, and wireless standards (LTE, WiFi, etc.)
  • Proficiency in MATLAB, C/C++, and/or Python; experience with software‑defined radios (e.g., GNU Radio)
  • Strong understanding of link budgets, modem algorithms, hardware architectures, ASIC/FPGA development flows, and lab equipment
  • Experience with Git, Atlassian tools (JIRA, Confluence, Bitbucket, Bamboo), and cross‑functional collaboration
ADDITIONAL REQUIREMENTS
  • Ability to work extended hours and weekends as needed to support critical project and mission milestones
COMPENSATION AND BENEFITS:

Pay Range:
Level 3: $165,000.00 - $265,000.00

Your actual level and base salary will be determined on a case‑by‑case basis and may vary based on the following considerations: job‑related knowledge and skills, education, and experience.

  • Base salary is just one part of your total rewards package at the company.
  • You may also be eligible for long‑term incentives, in the form of company stock or long‑term cash awards.
  • Potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan.
  • Access to comprehensive medical, vision, and dental coverage.
  • Access to a 401(k) retirement plan.
  • Short and long‑term disability insurance.
  • Life insurance.
  • Paid parental leave.
  • Various other discounts and perks.
  • Accrue 3 weeks of paid vacation.
  • Eligible for 10 or more paid holidays per year.
  • Employees accrue paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law.
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

the company is an Equal Opportunity Employer; employment with the company is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of the company’s Aff… or applicants requiring reasonable accommodation to the application/interview process should reach out to hr@unitedstatesdigital.space.

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