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Senior Asic Design Engineer Jobs in Layton, UT (NOW HIRING)

Spirax-Sarco Engineering

Senior Design Engineer

Ogden, UT · On-site

$85 - $120/hr

Senior Design Engineer Composed of Chromalox, Durex Industries, Vulcanic, and Thermocoax businesses, Electrical Thermal Solutions (ETS), part of Spirax Group, creates electrical process heating and ...

Chromalox, Inc.

Senior Design Engineer

Ogden, UT · On-site

Senior Design Engineer Composed of Chromalox, Durex Industries, Vulcanic, and Thermocoax businesses, Electrical Thermal Solutions (ETS), part of Spirax Group, creates electrical process heating and ...

Chromalox, Inc.

Senior Design Engineer

Ogden, UT · On-site

Reporting to the Senior Manager of Design Engineering, the Senior Design Engineer is responsible for designing and improving custom industrial heating systems that meet customer, regulatory, and ...

Chromalox

Senior Design Engineer

Ogden, UT · On-site

Reporting to the Senior Manager of Design Engineering, the Senior Design Engineer is responsible for designing and improving custom industrial heating systems that meet customer, regulatory, and ...

L3HHCM20

Sr. Specialist, Design

Salt Lake City, UT · On-site

Job Title: Sr Specialist, Mechanical Design Engineer Job Code: 39422 Job Location: Salt Lake City, UT Job Schedule: 9/80 Employees work 9 out of every 14 days- totaling 80 hours working- and have ...

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All JobsAsic Design Engineer JobsSenior Asic Design Engineer JobsSenior Asic Design Engineer Jobs in Layton, UT

Senior Asic Design Engineer information

See Layton, UT salary details

$127.2K

$161.4K

$199.4K

How much do senior asic design engineer jobs pay per year?

As of Aug 11, 2026, the average yearly pay for senior asic design engineer in Layton, UT is $161,410.00, according to ZipRecruiter salary data. Most workers in this role earn between $144,500.00 and $177,200.00 per year, depending on experience, location, and employer.

What does a senior ASIC design engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What are the key skills and qualifications needed to thrive as a senior ASIC design engineer?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

What are some common challenges senior ASIC design engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.
What cities near Layton, UT are hiring for Senior Asic Design Engineer jobs? Cities near Layton, UT with the most Senior Asic Design Engineer job openings:
Senior Asic Design Engineer jobs near you
Infographic showing various Senior Asic Design Engineer job openings in Layton, UT as of August 2026, with employment types broken down into 1% Internship, 83% Full Time, 12% Part Time, and 4% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $161,410 per year, or $77.6 per hour.

Direct-Hire -- Principal Digital ASIC Design Engineer -- Clearfield, UT (Onsite)

TWC Global Services LLC

Clearfield, UT • On-site

$126K/yr

Full-time

Re-posted 16 days ago

Job description

Job Title: Principal Digital ASIC Design Engineer

Location: Clearfield, UT (Onsite)

Job Type: Direct-Hire Position

Industry(ies) - Aerospace / Defense

Primary Skills - Digital ASIC design

Secondary Skills - Digital IC design

Occupational Categories - Engineering/ Manufacturing/ Production/ Operations

Job Description:

We are seeking talented and motivated individuals to tackle challenging engineering problems in advanced digital IC design. 

  • As a Principal Digital ASIC Designer, you will be responsible for designing high-performance digital ASICs in advanced technologies.
  • You will be responsible for implementing designs from RTL through synthesis.
  • You will work in multi-disciplinary teams with opportunities to learn, grow and contribute to a variety of projects in different application areas.

Duties/Responsibilities:

  • Drive solutions to complex problems with limited direction contribute to requirements development, propose ways forward, and adapt appropriately to changes in requirements.
  • Independently performs complex ASIC architectures and designs.
  • Provide insight and suggest design modifications based on simulation results.
  • Identify program/system-level technical risks and develop and execute mitigation strategies.
  • Manage a task with multiple engineers and effectively communicate status to project leadership and customers.
  • Mentor less experienced engineers and provide thoughtful, constructive feedback.
  • Perform other duties as assigned.

Skills/Abilities:

  • Proficiency in ASIC design, microprocessor programming or embedded computing.
  • Understanding of ASIC design and general computer architecture.
  • Ability to write detailed design specifications.
  • Computer programming and coding abilities.
  • Excellent verbal and written communication skills.
  • Excellent mathematical skills.
  • Excellent organizational skills and attention to detail.
  • Excellent time management skills with the proven ability to meet deadlines.
  • Strong analytical and problem-solving skills.
  • Ability to prioritize tasks.
  • Thorough understanding of engineering theories and procedures.

Education:

  • Requires bachelor's degree in engineering, or related field. Master’s degree preferred.

Experience:

  • Requires 7-10 years of experience with a bachelor's degree.

Additional Job Description:

  • Applicants should possess solid skills in front-end digital systems design with experience in design flows from Cadence or Synopsys.
  • Be fluent in System Verilog, Verilog or VHDL and familiar with LINT, simulation and synthesis.
  • Familiarity with architectures for secure systems design, e.g., cryptographic encoders / decoders or tagged processor architectures is a plus.
  • Demonstrated experience with successful tape-outs at advanced nodes is desired. Experience leading and managing design teams is also a plus.
  • Applicants selected for this position will be required to obtain and maintain a U.S. Security Clearance.