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Semiconductor Wafer Clean Process Engineer Jobs

Semtech

Backend Process Engineer

Alhambra, CA · On-site

$100K - $135K/yr

The Backend Process Engineer -InPWafer Fab positionis responsible fordevelopment, optimization, and ... Understanding ofInP-based or III-V compound semiconductor wafer fabrication processes * Experience ...

Teledyne FLIR LLC

Wafer Fab Process Engineer

Goleta, CA · On-site

$90K - $121K/yr

The work environment is mixed general office and clean room/lab. Primary Duties & Responsibilities ... Wafer processing tools for semiconductor or MEMS fabrication * Infrared detector technology

Teledyne

Wafer Fab Process Engineer

Goleta, CA · On-site

$90K - $121K/yr

The work environment is mixed general office and clean room/lab. Primary Duties & Responsibilities ... Wafer processing tools for semiconductor or MEMS fabrication * Infrared detector technology

CivicMinds, Inc.

... Engineer with 5+ years of experience in III-V semiconductor laser processing to develop and ... Develop and optimize photolithography, dry/wet etching, thin-film deposition, and wafer bonding.

Coherent Corp.

Process Engineer

Sherman, TX · On-site

Knowledge of general semiconductor wafer processing and engineering practices. * GaAs/InP ... Work in a class 100/1000 clean room for extended periods * Wear full cleanroom attire (smock, mask ...

II-VI Incorporated

Process Engineer

Sherman, TX · On-site

Knowledge of general semiconductor wafer processing and engineering practices. * GaAs/InP ... Work in a class 100/1000 clean room for extended periods * Wear full cleanroom attire (smock, mask ...

Coherent

Process Engineer

Sherman, TX · On-site

Knowledge of general semiconductor wafer processing and engineering practices. * GaAs/InP ... Work in a class 100/1000 clean room for extended periods * Wear full cleanroom attire (smock, mask ...

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Semiconductor Wafer Clean Process Engineer information

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How much do semiconductor wafer clean process engineer jobs pay per year?

As of Sep 9, 2026, the average yearly pay for semiconductor wafer clean process engineer in the United States is $92,018.00, according to ZipRecruiter salary data. Most workers in this role earn between $74,500.00 and $103,000.00 per year, depending on experience, location, and employer.

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Infographic showing various Semiconductor Wafer Clean Process Engineer job openings in the United States as of June 2026, with employment types broken down into 1% As Needed, 71% Full Time, 24% Part Time, 1% Temporary, 2% Contract, and 1% Nights. Highlights an 97% Physical, 2% Hybrid, and 1% Remote job distribution, with an average salary of $92,018 per year, or $44.2 per hour.

Backend Process Engineer

Alhambra, CA • On-site

Semtech
Semiconductor and Electronic Component Manufacturing • 1 - 5K employees
Learn more about Semtechexternal

$100K - $135K/yr

Full-time

Re-posted 24 days ago

Key responsibilities

  • Own and optimize backend waferfab processes including lapping/thinning, n-side metallization, and RTA.

  • Own and maintain AOI processes for defect detection and yield monitoring, and analyze data to identify trends and issues.

  • Support cleaving, dicing, singulation, optical coatings, and collaborate with packaging and reliability teams to ensure process readiness.

Job description

Location:Alhambra, CA

Position Summary:The Backend Process Engineer -InPWafer Fab positionis responsible fordevelopment, optimization, and manufacturing support of backend wafer fabrication processes for Indium Phosphide (InP)-based photonic devices, including DFB lasers, Semiconductor Optical Amplifiers (SOAs), and Gain Chip products. This role provides technical ownership of critical backend modules including wafer lapping/thinning, n-side metallization, rapid thermal annealing (RTA),andautomated optical inspection (AOI). The position also supports singulation, optical coatings, reliability readiness, and packaging interfaces, with a strong focus on yield, defect reduction, and manufacturing stability.

Responsibilities:

Backend Process Ownership and Optimization (35%):

  • Own andoptimizebackend waferfabprocesses including lapping/thinning, n-side metallization, and RTA

  • Establish robust process windows, recipes, and control limits for backend modules

  • Maintain stable manufacturing performance through continuous monitoring and improvement

Yield Improvement, Defect Reduction, and AOI Control (25%):

  • Own and maintain AOI processes for backend defect detection and yield monitoring

  • Drive singulation yield improvement and defect reduction through data analysis and root-cause investigations

  • Analyze inline and post-process data toidentifytrends and systematic issues

  • Implement corrective and preventive actions and verify effectiveness

Singulation,OpticalCoatings, and Packaging Interface Support (20%):

  • Support cleaving, dicing, and singulation processes to ensure device integrity

  • Provide process engineering support for AR/HR optical coatings and vendor qualifications

  • Collaborate with packaging, device, and reliability teams to ensure packaging readiness

New Product Introduction and Technology Support (10%):

  • Support new product introduction (NPI), process transfers, and technology changes

  • Evaluate backend process risks associated withnew designs, materials, and device structures

Documentation, Process Control, and Manufacturing Support (10%)

  • Author andmaintainSOPs, travelers, process specifications, and control plans

  • Define SPC metrics and control strategies for backend processes

  • Provide hands-on manufacturing and troubleshooting support as needed

Minimum Qualifications:

  • Bachelor's degree or higher in Chemical Engineering, Materials Science, Electrical Engineering, Physics, or a related field

  • Minimum of 3+ years of experience inbackend semiconductor processing

  • Hands-on experience with lapping/thinning, metallization, and thermal processes

  • Understanding ofInP-based or III-V compound semiconductor wafer fabrication processes

  • Experience with AOI systems, yield analysis, and data-driven process improvement

  • Strong understanding of singulation, packaging interfaces, and reliability requirements

  • Proficiencyin SPC, DOE, and statistical analysis

  • Ability to work across cross-functional manufacturing and engineering teams

  • Preferred experience withInPor III-V optoelectronic devices

  • Familiarity with AR/HR optical coating processes

  • Experience supporting high-mix, low-volume manufacturing environments preferred

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents maybe requiredto perform job-related tasks other than those specifically included in this description.

All duties and responsibilities are essentialjobfunctions and requirements and are subject topossible modificationtoreasonably accommodateindividuals with disabilities.

A reasonable estimate of the pay range for this position is $100,000 - $135,000. There are several factors taken into consideration indeterminingbase salary, including but not limited to: job-related qualifications, skills,educationand experience, as well as job location and the value of other elements of an employee's total compensation package.

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