1

Semiconductor Modeling Jobs in Portland, OR (NOW HIRING)

... commercial licensing models; supporting Software Bill of Materials (SBOM) initiatives; and ... At Lattice Semiconductor, we develop technologies that we monetize through differentiated ...

New

Expertise in semiconductor physics and advanced device interactions modeling. * Experience maintaining and troubleshooting semiconductor equipment. * Demonstrated ability to develop and present yield ...

Expertise in semiconductor physics and advanced device interactions modeling. * Experience maintaining and troubleshooting semiconductor equipment. * Demonstrated ability to develop and present yield ...

Expertise in semiconductor physics and advanced device interactions modeling. * Experience maintaining and troubleshooting semiconductor equipment. * Demonstrated ability to develop and present yield ...

Expertise in semiconductor physics and advanced device interactions modeling. * Experience maintaining and troubleshooting semiconductor equipment. * Demonstrated ability to develop and present yield ...

Expertise in semiconductor physics and advanced device interactions modeling. * Experience maintaining and troubleshooting semiconductor equipment. * Demonstrated ability to develop and present yield ...

next page

Showing results 1-20

Semiconductor Modeling information

See Portland, OR salary details

$62.6K

$95.2K

$129.9K

How much do semiconductor modeling jobs pay per year?

As of Aug 7, 2026, the average yearly pay for semiconductor modeling in Portland, OR is $95,216.00, according to ZipRecruiter salary data. Most workers in this role earn between $65,800.00 and $117,700.00 per year, depending on experience, location, and employer.

What is the difference between Semiconductor Modeling vs Semiconductor Design Engineer?

AspectSemiconductor ModelingSemiconductor Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of simulation toolsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; proficiency in CAD tools
Work EnvironmentResearch labs, simulation environments, design verification teamsDesign teams, fabrication facilities, R&D departments
Industry UsageUsed for device behavior prediction, circuit simulation, and performance analysisInvolved in creating actual chip layouts, circuit design, and prototype development

Semiconductor Modeling focuses on simulating and predicting device and circuit behavior using software tools, while Semiconductor Design Engineers develop the actual chip layouts and circuits. Both roles require similar educational backgrounds and often collaborate during product development, but their core responsibilities differ significantly.

What are popular job titles related to Semiconductor Modeling jobs in Portland, OR? For Semiconductor Modeling jobs in Portland, OR, the most frequently searched job titles are:
What job categories do people searching Semiconductor Modeling jobs in Portland, OR look for? The top searched job categories for Semiconductor Modeling jobs in Portland, OR are:
Infographic showing various Semiconductor Modeling job openings in Portland, OR as of August 2026, with employment types broken down into 94% Full Time, 3% Part Time, and 3% Contract. Highlights an 86% In-person, 6% Hybrid, and 8% Remote job distribution, with an average salary of $95,216 per year, or $45.8 per hour.

Semiconductor Device Modeling Engineer

Intel

Hillsboro, OR

$149K - $284K/yr

Full-time

Medical, Retirement, PTO

Re-posted 17 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 156 rated electronics manufacturers


Job description

Job Details:Job Description: 

About the Team

The Compact Device Modeling Group (CDMG) is part of Intel's Design Enablement (DE) organization. DE is a key pillar in enabling Intel to deliver design, development, and manufacturing services that allow internal and external customers to bring winning products to the marketplace. Your work will directly enable design teams to get to market faster with leadership products based on innovative technologies.

As a member of CDMG, you will be at the forefront of co-optimizing Intel's state-of-the-art process technology, enabling customers with diverse design needs to deliver best-in-class products for data-centric applications.

As a Semiconductor Device Modeling Engineer, you will be responsible for characterizing device behavior and generating/updating device models for new technologies while ensuring robust and accurate model simulations.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Minimum Qualifications:

  • Master's degree in Electrical Engineering or a related discipline with a minimum of 3+ years of industry experience in the semiconductor field; OR
  • PhD in Electrical Engineering or a related discipline with a minimum of 1 year of industry or research experience and a dissertation focused on semiconductor devices or processes.
  • Hands-on experience in Python or C, Shell programming.
  • Experience or course work in semiconductor device physics, process flow, layout and simple circuit design and simulation.
  • The ability to work independently after the initial ramp-up time.

Preferred Qualifications:

  • A Ph.D. degree in electrical engineering or related discipline with 3 + years of industry experience in the semiconductor field.
  • Experience in BSIM models and other compact models, extraction tools (ICCAP or MBP), and commercially available simulators. (example: HSPICE, SPECTRE, etc.)
  • Understanding of corner, statistical and sub-circuit models and their usages.
  • Understanding of layout effects and models.
  • Understanding of basic analog and digital circuit blocks and model interaction.
  • Hands-on experience in semiconductor device DC/CV characterization tools, techniques, and systems. Experience in test automation and RF/noise/reliability tests is a plus.
  • Understanding of Aging Simulations and reliability methodologies and tools is a plus.
  • Experienced in a Cadence design environment, including schematic capture, analog design environment, virtuoso layout design, DRC, LVS, and layout extractions.
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Arizona, Phoenix, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom


Intel logo

About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968