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Seasonal Rf Drive Test Engineer Jobs in Boise, ID

Sr. Software Development Engineer

Boise, ID · On-site

$116K - $153K/yr

Drive WiFi subsystem bring-up on new hardware platforms, including antenna tuning, RF calibration ... Mentor junior engineers, conduct code reviews, and establish engineering standards for the firmware ...

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Showing results 1-20

Seasonal Rf Drive Test Engineer information

See Boise, ID salary details

$41.9K

$120K

$196.1K

How much do seasonal rf drive test engineer jobs pay per year?

As of Aug 24, 2026, the average yearly pay for seasonal rf drive test engineer in Boise, ID is $119,969.00, according to ZipRecruiter salary data. Most workers in this role earn between $96,600.00 and $137,100.00 per year, depending on experience, location, and employer.

What is the difference between Seasonal Rf Drive Test Engineer vs RF Test Engineer?

AspectSeasonal Rf Drive Test EngineerRF Test Engineer
CertificationsTypically includes RF or wireless certifications, sometimes seasonal or project-specificOften requires RF or electronics certifications, such as FCC or vendor-specific certifications
Work EnvironmentField-based, conducting drive tests in various outdoor locations during specific seasonsLaboratory or production environment, testing RF equipment and components
Industry UsagePrimarily in telecom and wireless network deployment, focusing on network performanceIn telecom, electronics manufacturing, or testing labs, focusing on device or component performance

Seasonal Rf Drive Test Engineers focus on field testing wireless networks during specific seasons, while RF Test Engineers typically work in labs testing RF hardware and devices. Both roles require RF certifications but differ mainly in work environment and application focus.

What are the most commonly searched types of Rf Drive Test Engineer jobs in Boise, ID?

The most popular types of Rf Drive Test Engineer jobs in Boise, ID are:

What are popular job titles related to Seasonal Rf Drive Test Engineer jobs in Boise, ID?

For Seasonal Rf Drive Test Engineer jobs in Boise, ID, the most frequently searched job titles are:

What job categories do people searching Seasonal Rf Drive Test Engineer jobs in Boise, ID look for?

The top searched job categories for Seasonal Rf Drive Test Engineer jobs in Boise, ID are:

Infographic showing various Seasonal Rf Drive Test Engineer job openings in Boise, ID as of August 2026, with employment types broken down into 2% Internship, 86% Full Time, and 12% Contract. Highlights an 97% In-person, and 3% Hybrid job distribution, with an average salary of $119,969 per year, or $57.7 per hour.

Senior DRAM Security Test Engineer

Micron Technology, Inc

Boise, ID • On-site

$140 - $190/hr

Other

PTO

Re-posted 10 days ago


Micron Technology rating

8.6

Company rating: 8.6 out of 10

Based on 43 frontline employees who took The Breakroom Quiz

28th of 159 rated electronics manufacturers


Job description

Senior DRAM Security Test Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The Senior DRAM Security Test Engineer develops advanced security validation infrastructure used to assess the resilience, robustness, and effectiveness of security mitigations in modern memory products. This role combines FPGA development, software engineering, AI‑assisted development, automation, and memory architecture expertise to create scalable platforms capable of accomplishing complex DRAM validation and characterization workloads.

Responsibilities
  • Design, develop, and maintain advanced security‑focused DRAM test infrastructure employed to verify memory resilience, mitigation effectiveness, and security‑relevant behaviors.
  • Develop FPGA‑based platforms capable of accomplishing complex DRAM command sequences with nanosecond‑level timing precision and high‑throughput operation.
  • Build software frameworks, automation systems, and execution pipelines that translate high‑level security test objectives into hardware‑executable workloads.
  • Use AI‑assisted development tools such as Claude and other LLMs to speed up software development, RTL generation, debugging, automation, test creation, and technical documentation.
  • Develop tools and workflows that support quick prototyping, characterization, and deployment of new security validation methodologies.
  • Create security‑focused test capabilities used to evaluate memory disturbance mechanisms, attack surfaces, mitigation behavior, fault conditions, and adversarial access patterns.
  • Integrate host software, FPGA platforms, PCIe interfaces, and DRAM subsystems into scalable validation environments supporting large characterization and analytics campaigns.
  • Partner with Product Security researchers, DRAM architects, and development teams to develop threat‑informed validation strategies and boost security testing effectiveness.
  • Analyze results from large‑scale validation campaigns and develop automated workflows that improve triage, insight generation, root‑cause analysis, and reporting.
  • Drive continuous improvements in platform scalability, maintainability, developer productivity, and test execution efficiency through automation and AI‑enabled engineering practices.
  • Document architecture, workflows, development standards, and validation methodologies while providing technical leadership and mentorship across engineering teams.
  • Define and complete the roadmap for next‑generation DRAM security test infrastructure, enabling faster evaluation of emerging threats, mitigations, and architectural enhancements.
Minimum Qualifications
  • BS in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
  • Proven experience with FPGA build using Verilog, SystemVerilog, or VHDL.
  • Skilled in FPGA development environments including Xilinx Vivado or Intel Quartus.
  • Strong software development skills in Python and/or C++.
  • Experience with hardware/software integration and automation.
  • Understanding of digital build, memory systems, and test methodologies.
  • Excellent debugging, problem‑solving, and documentation skills.
  • Experience working with Claude or comparable AI‑supported software development tools to speed up coding, debugging, automation, test generation, and documentation.
Preferred Qualifications
  • Experience with DRAM architecture, memory subsystems, or JEDEC protocols.
  • Familiarity with ATE, FPGA‑based validation systems, or custom test platforms.
  • Established experience in building automated characterization and validation workflows.
  • Knowledge of PCIe, AXI, DMA, and high‑performance data movement architectures.
  • Experience in improving test coverage, throughput, and validation efficiency through custom tooling and automation.
Job Profile(s)

Firmware Engineer 3

Relocation Level: TBD

Benefits

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays.

Equal Opportunity Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Application Assistance

For US sites only: Please contact Micron’s People Organization at hrsupport_na@micron.com.

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