Hello,
I hope you're doing well.
My name is Vyshu, and I’m reaching out from Intellectt Inc. regarding an exciting contract opportunity for a DFT Engineers based in Santa Clara, California with one of our prestigious clients.
I would love to connect and discuss this opportunity in more detail. Please feel free to share your updated resume at vyshnavi.t@intellectt.com
Title: DFT Engineers
Location: Santa Clara, California
Job Description
We are looking for a DFT / ATPG Engineer with strong experience in SoC/ASIC test methodologies, SCAN, MBIST, ATPG, and IJTAG implementation. The candidate will work on DFT insertion, verification, pattern generation, coverage analysis, and debug for high-performance semiconductor designs.
Required Skills & Qualifications:
BE/B.Tech in Electronics or related field
5+ years of hands-on experience in DFT and ATPG for SoC/ASIC designs
Strong knowledge of:
- SCAN (with SSN), MBIST, ATPG
- DFT fundamentals (controllability, observability, scan testing)
- Digital design and RTL concepts
- Clock DFT and IO Test methodologies
Experience in:
- ATPG pattern generation, debug, and coverage analysis
- MBIST repair implementation and verification
- DRC debug and fault model validation
- Generating test timing and PnR collaterals
- Expertise in IJTAG (IEEE 1687), ICL, and PDL standards
Verification experience for:
- Boundary Scan
- JTAG
- SCAN
- MBIST
- High-Speed IO
- ATPG
- Familiarity with Siemens DFT tool suite and industry-standard EDA tools
- Strong analytical, debugging, and communication skills
- Ability to work in fast-paced semiconductor programs
Thanks & Regards,
Vyshnavi
Recruiter
Intellectt Inc
vyshnavi.t@intellectt.com
Direct: 732 204 6550
Desk number: 732 412 6999 - Ext: 225