RTL Design Engineer
Cupertino, CA · On-site
... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...
RTL Design Engineer
Cupertino, CA · On-site
... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...
Wireless Design Verification Engineer
San Francisco, CA · On-site
$160K - $195K/yr
As a Wireless Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC. You will interact with DV ...
Wireless Design Verification Engineer
San Francisco, CA · On-site
$160K - $195K/yr
As a Wireless Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC. You will interact with DV ...
RTL Design Engineer
Beaverton, OR · On-site
... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...
RTL Design Engineer
Beaverton, OR · On-site
... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...
PHY Design Verification Engineer
San Francisco, CA · On-site
$160K - $195K/yr
As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact ...
PHY Design Verification Engineer
San Francisco, CA · On-site
$160K - $195K/yr
As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact ...
OR · On-site
$130K - $200K/yr
You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...
RTL Design Engineer
Austin, TX · On-site
... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...
RTL Design Engineer
Austin, TX · On-site
... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...
RTL Design Engineer
Irvine, CA · On-site
... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...
RTL Design Engineer
Irvine, CA · On-site
... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...
Senior Design Verification Engineer
San Diego, CA · On-site
$144K - $176K/yr
We provide complete end-to-end solutions for ASIC/FPGA Design both in Digital/Analog which includes RTL Design & Implementation, Functional Verification, Physical Design, AMS Verification, Layout ...
Senior Design Verification Engineer
San Diego, CA · On-site
$144K - $176K/yr
We provide complete end-to-end solutions for ASIC/FPGA Design both in Digital/Analog which includes RTL Design & Implementation, Functional Verification, Physical Design, AMS Verification, Layout ...
GPU Design Engineer
Austin, TX · On-site
Drive best-in-class RTL quality, verification coverage, and sign-off discipline across Qualcomm GPU family of products * Influence and shape architecture tradeoffs related to performance, power, area ...
GPU Design Engineer
Austin, TX · On-site
Drive best-in-class RTL quality, verification coverage, and sign-off discipline across Qualcomm GPU family of products * Influence and shape architecture tradeoffs related to performance, power, area ...
Design Verification Engineer
$144K - $176K/yr
Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong ... RTL design experience and/or very strong OOPs programming experience is also a plus. Good written ...
Design Verification Engineer
$144K - $176K/yr
Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong ... RTL design experience and/or very strong OOPs programming experience is also a plus. Good written ...
Design Verification Engineer
Plano, TX · On-site
$130K - $158K/yr
You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...
Quick apply
Design Verification Engineer
Plano, TX · On-site
$130K - $158K/yr
You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...
Design Verification Engineer
Sunnyvale, CA · On-site +1
$120K - $240K/yr
Collaborate with cross-functional teams, including architecture, RTL design, physical design ... Continuously enhances verification infrastructure and flows to improve efficiency and quality.
Design Verification Engineer
Sunnyvale, CA · On-site +1
$120K - $240K/yr
Collaborate with cross-functional teams, including architecture, RTL design, physical design ... Continuously enhances verification infrastructure and flows to improve efficiency and quality.
PHY RTL Design Engineer
Irvine, CA · On-site
... RTL design and integration, Emulation ... Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal ...
PHY RTL Design Engineer
Irvine, CA · On-site
... RTL design and integration, Emulation ... Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal ...
PHY RTL Design Engineer
Irvine, CA · On-site
... RTL design and integration, Emulation ... Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal ...
PHY RTL Design Engineer
Irvine, CA · On-site
... RTL design and integration, Emulation ... Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal ...
Design Verification Engineer - Remote - Contract opportunity
Irvine, CA · Remote
$139K - $169K/yr
You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...
New
Quick apply
Design Verification Engineer - Remote - Contract opportunity
Irvine, CA · Remote
$139K - $169K/yr
You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...
New
Design Verification Engineer
$190K - $230K/yr
Collaborate with cross-functional teams including architecture, RTL design, physical design ... Continuously enhances verification infrastructure and flows to improve efficiency and quality.
Design Verification Engineer
$190K - $230K/yr
Collaborate with cross-functional teams including architecture, RTL design, physical design ... Continuously enhances verification infrastructure and flows to improve efficiency and quality.
PHY RTL Design Engineer
Irvine, CA · On-site
... RTL design and integration, Emulation ... Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal ...
PHY RTL Design Engineer
Irvine, CA · On-site
... RTL design and integration, Emulation ... Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal ...
Principal RTL Design
Boise, ID · On-site
Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon ... Collaborate closely with physical design, verification, and architecture teams to achieve timing ...
Principal RTL Design
Boise, ID · On-site
Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon ... Collaborate closely with physical design, verification, and architecture teams to achieve timing ...
Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon ... Collaborate closely with physical design, verification, and architecture teams to achieve timing ...
Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon ... Collaborate closely with physical design, verification, and architecture teams to achieve timing ...
Design Verification Engineer (Data Fabric Verification Engineer)
East Brunswick, NJ · On-site
$135K - $165K/yr
Exposure to RTL design, software development, formal verification, or other related domains. Good understanding of computer organization/architecture. Experience or familiarity with formal tools and ...
Design Verification Engineer (Data Fabric Verification Engineer)
East Brunswick, NJ · On-site
$135K - $165K/yr
Exposure to RTL design, software development, formal verification, or other related domains. Good understanding of computer organization/architecture. Experience or familiarity with formal tools and ...
Rtl Design Verification information
See salary details
$105.5K - $111.1K
0% of jobs
$111.1K - $116.7K
0% of jobs
$116.7K - $122.3K
0% of jobs
$122.3K - $127.9K
0% of jobs
$127.9K - $133.5K
0% of jobs
$135.6K is the 25th percentile. Wages below this are outliers.
$133.5K - $139K
65% of jobs
$139K - $144.6K
0% of jobs
$144.6K - $150.2K
0% of jobs
$150.2K - $155.8K
0% of jobs
$155.8K - $161.4K
0% of jobs
$163K is the 75th percentile. Wages above this are outliers.
$161.4K - $167K
35% of jobs
$105.5K
$149.2K
$167K
How much do rtl design verification jobs pay per year?
As of Jun 25, 2026, the average yearly pay for rtl design verification in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.
What are the key skills and qualifications needed to thrive as an RTL Design Verification Engineer, and why are they important?
To thrive as an RTL Design Verification Engineer, you need a strong background in digital logic design, computer architecture, and verification methodologies, often supported by a degree in electrical or computer engineering. Proficiency with tools like SystemVerilog, UVM, simulation environments (e.g., ModelSim, VCS), and scripting languages (such as Python or Perl) is essential. Strong analytical thinking, attention to detail, and effective communication are vital soft skills for collaborating with design teams and debugging complex systems. These skills ensure that digital designs function correctly and reliably before hardware fabrication, which is critical for product quality and project success.
What are the most common challenges faced by RTL Design Verification engineers, and how can they be overcome?
RTL Design Verification engineers often encounter challenges such as identifying complex corner-case bugs, keeping up with evolving verification methodologies, and managing tight project deadlines. To overcome these, engineers use advanced verification techniques like constrained-random testing, assertion-based verification, and coverage-driven development. Collaborating closely with design engineers and leveraging automated tools also helps streamline the process and ensure thorough verification. Building strong communication and problem-solving skills is key to navigating these challenges effectively.
What are RTL Design Verification engineers?
RTL (Register Transfer Level) Design Verification engineers are responsible for ensuring that digital circuit designs function correctly before they are fabricated into silicon chips. They create and run simulations, develop testbenches, and write verification plans to check that the design meets the required specifications. Their work helps identify and fix logic errors early in the design process, saving time and costs in hardware development. RTL Design Verification engineers typically work closely with design and validation teams and use specialized tools and languages such as SystemVerilog, UVM, and simulation software.
What is the difference between Rtl Design Verification vs Rtl Simulation Engineer?
| Aspect | Rtl Design Verification | Rtl Simulation Engineer |
|---|---|---|
| Primary Focus | Verifying RTL design correctness and functionality | Running simulations to validate RTL code behavior |
| Skills Required | Hardware description languages, verification methodologies, testbench development | Simulation tools, scripting, HDL proficiency |
| Work Environment | Design teams, verification environments, EDA tools | Simulation labs, EDA software, hardware description languages |
Both roles involve working with RTL code and require knowledge of hardware description languages. However, Rtl Design Verification focuses on creating verification environments and ensuring design correctness, while Rtl Simulation Engineer primarily runs and analyzes simulations to validate RTL behavior. They often collaborate but serve different stages in the hardware development process.
What cities are hiring for Rtl Design Verification jobs? Cities with the most Rtl Design Verification job openings:
What states have the most Rtl Design Verification jobs? States with the most job openings for Rtl Design Verification jobs include:
Apple rating
8.1
Based on 662 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
At Apple, we work every day to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon design team!
This role will build upon your solid foundation in digital logic circuits while introducing mixed-signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits, ensuring formal equivalence between custom designs and their abstract representations. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits with signal processing capabilities.
Description
In this role, you will be responsible for specifying and/or micro-architecting digital and signal processing blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others, including implementation of DSP algorithms. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, and validating signal processing performance.
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience
Preferred Qualifications
Front-end tools expertise (Verilog simulators, linters, clock-domain crossing checkers)
Synthesis, static timing analysis, and design-for-test (DFT)
SystemVerilog assertions, checkers, and advanced verification techniques
Scripting languages (Perl, Python)
Formal verification and low-power design methodologies
Hardware-software co-design and system-level optimization
Hands-on DSP experience: signal processing concepts, RTL algorithm implementation, hardware optimization techniques (pipelining, parallelization, resource sharing)
Intermediate to advanced GenAI proficiency: Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI capabilities/limitations in hardware design
This role will build upon your solid foundation in digital logic circuits while introducing mixed-signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits, ensuring formal equivalence between custom designs and their abstract representations. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits with signal processing capabilities.
Description
In this role, you will be responsible for specifying and/or micro-architecting digital and signal processing blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others, including implementation of DSP algorithms. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, and validating signal processing performance.
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience
Preferred Qualifications
Front-end tools expertise (Verilog simulators, linters, clock-domain crossing checkers)
Synthesis, static timing analysis, and design-for-test (DFT)
SystemVerilog assertions, checkers, and advanced verification techniques
Scripting languages (Perl, Python)
Formal verification and low-power design methodologies
Hardware-software co-design and system-level optimization
Hands-on DSP experience: signal processing concepts, RTL algorithm implementation, hardware optimization techniques (pipelining, parallelization, resource sharing)
Intermediate to advanced GenAI proficiency: Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI capabilities/limitations in hardware design
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976