ZipRecruiter

Log In

2

Remote Sram Design Engineer Jobs in Riverside, CA

Race Communications

Fiber Designer I - Remote

Phelan, CA · Remote

$27 - $30/hr

Remote: California Location Status: Work will be primarily performed remotely from home office ... The Fiber Designer 1 plays a key role in the planning and design of fiber optic networks, ensuring ...

PM2CM

Cost Engineer Hybrid-Remote

Anaheim, CA · On-site +1

... the design and construction phase of projects. Our core expertise is in Project Controls which ... Hybrid-Remote (Tuesday and Wednesday in the office/field) JOB OPPORTUNITY: WE ARE HIRING JUNIOR ...

PM2CM

Cost Engineer Hybrid-Remote

Riverside, CA · On-site +1

... the design and construction phase of projects. Our core expertise is in Project Controls which ... Hybrid-Remote (Tuesday and Wednesday in the office/field) JOB OPPORTUNITY: WE ARE HIRING JUNIOR ...

PM2CM

Cost Engineer Hybrid-Remote

Pomona, CA · On-site +1

... the design and construction phase of projects. Our core expertise is in Project Controls which ... Hybrid-Remote (Tuesday and Wednesday in the office/field) JOB OPPORTUNITY: WE ARE HIRING JUNIOR ...

PM2CM

Cost Engineer Hybrid-Remote

San Bernardino, CA · On-site +1

... the design and construction phase of projects. Our core expertise is in Project Controls which ... Hybrid-Remote (Tuesday and Wednesday in the office/field) JOB OPPORTUNITY: WE ARE HIRING JUNIOR ...

next page

Showing results 1-20

All JobsSram Design Engineer JobsRemote Sram Design Engineer JobsRemote Sram Design Engineer Jobs in Riverside, CA

Remote Sram Design Engineer information

See Riverside, CA salary details

$18

$52

$76

How much do remote sram design engineer jobs pay per hour?

As of Jul 14, 2026, the average hourly pay for remote sram design engineer in Riverside, CA is $52.88, according to ZipRecruiter salary data. Most workers in this role earn between $40.87 and $64.47 per hour, depending on experience, location, and employer.

What is the difference between Remote Sram Design Engineer vs Remote Memory Design Engineer?

AspectRemote Sram Design EngineerRemote Memory Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI design experienceBachelor's or Master's in Electrical Engineering, VLSI or semiconductor design experience
Work EnvironmentDesign teams, semiconductor companies, remote collaborationMemory chip companies, integrated circuit design teams, remote work
Industry UsageUsed in digital circuit design, embedded systems, and hardware developmentUsed in memory chip development, hardware architecture, and semiconductor industry

Remote Sram Design Engineers focus on designing static RAM components used in digital systems, while Remote Memory Design Engineers work on broader memory architectures including DRAM, Flash, and other memory types. Both roles require similar technical skills and often operate in similar environments, but they specialize in different memory technologies and applications.

What are popular job titles related to Remote Sram Design Engineer jobs in Riverside, CA? For Remote Sram Design Engineer jobs in Riverside, CA, the most frequently searched job titles are:
What job categories do people searching Remote Sram Design Engineer jobs in Riverside, CA look for? The top searched job categories for Remote Sram Design Engineer jobs in Riverside, CA are:
What cities near Riverside, CA are hiring for Remote Sram Design Engineer jobs? Cities near Riverside, CA with the most Remote Sram Design Engineer job openings:
Remote Sram Design Engineer jobs near you
Design Verification Engineer - Remote - Contract opportunity

Design Verification Engineer - Remote - Contract opportunity

Zodiac Solutions

Irvine, CA • Remote

$139K - $169K/yr

Contractor

Posted 20 days ago

Job description

Role – Design Verification Engineer

Location – Remote (must be aligned with PST time zone)

Duration- Contract opportunity

 Job Description and other details –

We are seeking an ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon. 

Qualifications 

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
  • 3+ years of experience in ASIC/SoC verification.
  • Solid understanding of SystemVerilog, digital logic, and hardware verification flows.
  • Proficiency with a simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision) and coverage tool.
  • Experience with test planning, testbench development, constrained-random testing, and coverage analysis.
  • Familiarity with a scripting language (ex: Python, Perl, TCL) and revision control system (ex: Git). 

Responsibilities 

  • Develop and execute verification plans for block-level, subsystem-level, and full-chip environments.
  • Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.
  • Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.
  • Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.
  • Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.
  • Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.
  • Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.
  • Participate in design reviews and microarchitecture discussions.