RFIC Layout Design Engineer
Richardson, TX (Hybrid) or Remote for Qualified Candidates
W2 or Contract Opportunity Available
About IC Enable
For over 20 years IC Enable has successfully provided design IP, IC products, services, and platform solutions to demanding customers ranging from startups to Fortune 50 members. Our design and product offerings focus on high-reliability mixed-signal and digital markets, while our platform solutions support IDM, foundry, and IP providers.
Now is an exciting time to join our team as we continue advancing technology development, full-custom ASIC / SoC, and electronics solutions across the Semiconductor, Medical, and Defense industries, including some of the industry's most challenging fabrication processes and product applications.
Position Overview
IC Enable is seeking an experienced RFIC Layout Design Engineer to join our growing team. In this role, you will work closely with RF designers and layout engineers to develop high-quality transistor-level layouts for advanced RF and analog circuit blocks in deep sub-micron CMOS technologies.
The ideal candidate will bring strong experience with advanced FinFET technology nodes, custom RF/analog layout techniques, and physical verification flows while thriving in a collaborative, fast-paced engineering environment.
Key Responsibilities
โข Develop detailed custom transistor-level layouts for RF and analog circuit blocks including:
- Bandgap / Bias / LDO
- ADC/DAC
- Baseband Filters
- Modulators
- Power Amplifiers
- PLL and LO Generation
- LNA and Mixer circuits
โข Perform and support full physical verification flows including:
- DRC
- LVS
- ERC
- DFM
- Parasitic extraction
โข Ensure layout quality related to:
- Power and ground routing
- Electromigration reliability
- Signal integrity and coupling
- Differential and IQ matching
- High-frequency routing considerations
โข Collaborate closely with RF designers, circuit designers, and layout teams to resolve design and verification issues efficiently
โข Contribute to layout methodology improvements and maintain high-quality design standards throughout the tapeout process
Minimum Qualifications
โข Minimum 5 years of industry experience in custom RF/analog layout
โข Experience with advanced FinFET technology nodes including TSMC/Samsung 7nm, 5nm, and 4nm
โข High proficiency interpreting Calibre DRC, ERC, and LVS results
โข Strong experience with Cadence layout tools
โข Deep understanding of custom RF/analog layout techniques in deep sub-micron CMOS technologies
Preferred Qualifications
โข Knowledge of guard rings, DNW, PN junctions, and advanced process effects including LOD and WPE
โข Experience with device matching, parasitic reduction, RF shielding, and high-frequency routing techniques
โข Strong understanding of RC delay, electromigration, and signal coupling effects
โข Experience supporting high-performance mixed-signal and RFIC designs through tapeout
โข Strong communication and collaboration skills across cross-functional engineering teams
Why Join IC Enable
At IC Enable, we know our most valuable asset is our team. We are seeking individuals who are excited to grow with us and contribute to a culture built around people who are humble, hungry, and smart.
IC Enable benefits include:
โข Medical, Dental, Vision, and Ancillary Benefits
โข 401(k) with Company Match
โข Opportunity to work on advanced semiconductor technologies and cutting-edge applications
IC Enable is an Equal Opportunity Employer.