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Remote Python Automation Engineer Jobs in Ontario, CA

Software C++ Engineer

Irvine, CA ยท Remote

$150K - $213K/yr

Own developer-facing automation, including but not limited to: * Improving build reliability ... Proficiency in C++, Python, CMake, MATLAB, and Fortran. * A functional understanding of C++17/20.

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Remote Python Automation Engineer information

See Ontario, CA salary details

$23.4K

$142.4K

$206K

How much do remote python automation engineer jobs pay per year?

As of Jul 14, 2026, the average yearly pay for remote python automation engineer in Ontario, CA is $142,412.00, according to ZipRecruiter salary data. Most workers in this role earn between $112,400.00 and $167,400.00 per year, depending on experience, location, and employer.

How does a Remote Python Automation Engineer typically collaborate with cross-functional teams, given the remote work environment?

As a Remote Python Automation Engineer, you'll frequently interact with developers, QA analysts, DevOps teams, and project managers using collaborative tools such as Slack, Jira, and GitHub. Effective communication is crucial for aligning on automation requirements, debugging issues, and deploying solutions. You'll often participate in virtual meetings, code reviews, and sprint planning sessions to ensure your automation scripts integrate seamlessly with broader workflows. Proactive documentation and regular updates help maintain transparency and foster smooth teamwork despite the physical distance.

What is the difference between Remote Python Automation Engineer vs Remote QA Automation Engineer?

AspectRemote Python Automation EngineerRemote QA Automation Engineer
Required CredentialsBachelor's in CS or related, Python proficiency, automation tools knowledgeBachelor's in CS or related, testing frameworks, scripting skills, Python often preferred
Work EnvironmentDevelops automation scripts, collaborates with development teams, uses Python-based toolsDesigns test cases, automates testing processes, uses testing frameworks and scripting
Employer & Industry UsageTech companies, software development, DevOps teamsSoftware companies, QA teams, product testing environments

The main difference is that Remote Python Automation Engineers focus on developing automation solutions using Python to streamline development and deployment processes, while Remote QA Automation Engineers concentrate on automating testing procedures to ensure software quality. Both roles require Python skills but serve different stages of the software lifecycle.

What is a Remote Python Automation Engineer?

A Remote Python Automation Engineer is a software professional who specializes in creating, maintaining, and improving automated processes and workflows using the Python programming language, all while working remotely. Their main responsibilities often include writing scripts to automate repetitive tasks, building test automation frameworks, integrating APIs, and optimizing system operations. They collaborate with teams virtually, making use of tools for version control, communication, and project management. This role requires strong Python skills, familiarity with automation tools like Selenium or PyTest, and the ability to work independently in a remote setting.

What are the key skills and qualifications needed to thrive as a Remote Python Automation Engineer, and why are they important?

To thrive as a Remote Python Automation Engineer, you need strong programming skills in Python, expertise in automation frameworks, and a background in computer science or related fields. Familiarity with tools such as Selenium, PyTest, Jenkins, and cloud platforms, along with automation certifications, is often required. Exceptional problem-solving, self-motivation, and effective communication are crucial soft skills for remote collaboration and troubleshooting. These abilities ensure efficient automation solutions, seamless integration with development teams, and successful delivery of high-quality software projects.
What are popular job titles related to Remote Python Automation Engineer jobs in Ontario, CA? For Remote Python Automation Engineer jobs in Ontario, CA, the most frequently searched job titles are:
What job categories do people searching Remote Python Automation Engineer jobs in Ontario, CA look for? The top searched job categories for Remote Python Automation Engineer jobs in Ontario, CA are:
What cities near Ontario, CA are hiring for Remote Python Automation Engineer jobs? Cities near Ontario, CA with the most Remote Python Automation Engineer job openings:
Lead ASIC DFT Engineer - Remote (PST time zone) - Contract Opportunity

Lead ASIC DFT Engineer - Remote (PST time zone) - Contract Opportunity

Zodiac Solutions

Irvine, CA โ€ข Remote

Contractor

Posted 19 days ago


Job description

Title - Lead ASIC DFT Engineer

Location โ€“ Remote (must be aligned with PST time zone)

Duration โ€“ Contract Opportunity

Required Visa: Any Visa

Job Description

Key skills for Lead ASIC DFT:

please see these key words of in the project description for the profile consideration.

ย ย โ€œSCAN, ATPG, MBIST, Timing Simulations, ย SDF, SDC , ย PSV, Diagnosys , ย Pattern Retargeting , Pattern porting, ย DRCs, ย TetraMax, DFTMax โ€œ

Experience

10+ years of hands-on experience in ASIC Design-for-Test (DFT)

Role Summary

We are seeking a highly experienced Lead ASIC DFT Engineerย to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.

The ideal candidate will have strong hands-on expertise in DFT fundamentals, fault models, test coverage, diagnosis, and debug, as well as the ability to evaluate and adopt emerging DFT methodologies and architecture schemes to improve robustness, quality, and yield.

Key Responsibilities

  • Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
  • Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
  • Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
  • Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
  • Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
  • Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
  • Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
  • Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
  • Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
  • Act as a technical escalation point for advanced DFT and post-silicon debug issues.
  • Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
  • Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.

Required Skills & Qualifications

  • Strong hands-on experience in ASIC DFT with end-to-end ownership.
  • Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.
  • Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.
  • Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.
  • Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.
  • Experience with MBIST implementation and verification; SMS experience preferred.
  • Experience with scan architecture and scan chain stitching; Tessent/SSN experience preferred.
  • Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and physical design implementation.
  • Proven post-silicon debug and silicon bring-up experience.
  • Exposure to large SoC designs, hierarchical DFT flows, and multi-domain integration challenges.
  • Strong communication skills and the ability to work independently with minimal ramp-up.

Preferred Experience

  • MBIST post-silicon validation.
  • ATPG simulations and fault coverage debug.
  • DFT RTL, DFD, DFT verification, and IP-level DFT integration.
  • DFT SDC creation and DFT timing closure support.
  • Boundary scan, iJTAG, SSN, and design-for-debug methodologies.
  • TCL/PERL scripting for DFT automation, reporting, and debug.
  • Experience working across multiple ASIC technology nodes and complex product development cycles.
  • Familiarity with yield learning, diagnosis, and manufacturing test optimization.