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Remote Matlab Simulation Engineer Jobs in Diamond Bar, CA

Aveva

Power System Engineer

Irvine, CA · On-site +1

Power System Engineer Location: Irvine, CAJob type: Full-time / Hybrid Position Summary ETAP is ... Familiarity with simulation and modeling tools (e.g., MATLAB, Simulink) is a plus * Strong ...

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All JobsMatlab Simulation Engineer JobsRemote Matlab Simulation Engineer JobsRemote Matlab Simulation Engineer Jobs in Diamond Bar, CA

Remote Matlab Simulation Engineer information

See Diamond Bar, CA salary details

$40.7K

$128.9K

$199K

How much do remote matlab simulation engineer jobs pay per year?

As of Aug 14, 2026, the average yearly pay for remote matlab simulation engineer in Diamond Bar, CA is $128,909.00, according to ZipRecruiter salary data. Most workers in this role earn between $96,100.00 and $153,000.00 per year, depending on experience, location, and employer.

What is the difference between Remote Matlab Simulation Engineer vs Remote Data Analyst?

AspectRemote Matlab Simulation EngineerRemote Data Analyst
Required SkillsMatlab, simulation, modeling, programmingData analysis, statistics, Excel, SQL
Work EnvironmentEngineering teams, simulation labs, R&DBusiness teams, data warehouses, reporting tools
Industry UsageEngineering, aerospace, automotive, researchFinance, marketing, healthcare, tech

The Remote Matlab Simulation Engineer primarily focuses on developing and running simulations using Matlab for engineering projects, while the Remote Data Analyst interprets data to support business decisions. Both roles require analytical skills but differ in technical tools and industry applications. Understanding these differences helps job seekers target the right roles based on their skills and career goals.

What are popular job titles related to Remote Matlab Simulation Engineer jobs in Diamond Bar, CA?

For Remote Matlab Simulation Engineer jobs in Diamond Bar, CA, the most frequently searched job titles are:

What cities near Diamond Bar, CA are hiring for Remote Matlab Simulation Engineer jobs?

Cities near Diamond Bar, CA with the most Remote Matlab Simulation Engineer job openings:

Remote Matlab Simulation Engineer jobs near you
Infographic showing various Remote Matlab Simulation Engineer job openings in Diamond Bar, CA as of August 2026, with employment types broken down into 68% Full Time, 22% Part Time, and 10% Contract. Highlights an 100% Remote job distribution, with an average salary of $128,909 per year, or $62 per hour.

Design Verification Engineer - Remote - Contract opportunity

Zodiac Solutions

Irvine, CA • Remote

$139K - $169K/yr

Contractor

Re-posted 21 days ago

Job description

Role – Design Verification Engineer

Location – Remote (must be aligned with PST time zone)

Duration- Contract opportunity

 Job Description and other details –

We are seeking an ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon. 

Qualifications 

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
  • 3+ years of experience in ASIC/SoC verification.
  • Solid understanding of SystemVerilog, digital logic, and hardware verification flows.
  • Proficiency with a simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision) and coverage tool.
  • Experience with test planning, testbench development, constrained-random testing, and coverage analysis.
  • Familiarity with a scripting language (ex: Python, Perl, TCL) and revision control system (ex: Git). 

Responsibilities 

  • Develop and execute verification plans for block-level, subsystem-level, and full-chip environments.
  • Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.
  • Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.
  • Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.
  • Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.
  • Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.
  • Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.
  • Participate in design reviews and microarchitecture discussions.