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Remote Lead Flutter Developer Jobs in Sunnyvale, CA

3M HEALTHCARE

Automation Lead

Mountain View, CA · On-site +1

$152K - $187K/yr

Collaborate with product managers, developers, and feature owners while managing external ... remote, the specific salary range for your preferred location, during the hiring process. Waymo ...

3M HEALTHCARE

Automation Lead

Mountain View, CA · On-site +1

$152K - $187K/yr

Collaborate with product managers, developers, and feature owners while managing external ... remote, the specific salary range for your preferred location, during the hiring process. Waymo ...

31st Union

Lead UI Engineer

San Mateo, CA · On-site +1

$133K - $198K/yr

What We Need: We're seeking a Lead UI Engineer, to provide tech direction for our AAA multiplayer ... This includes dynamic screen layouts, remote control reordering, friction reduction, and real-time ...

Adobe

Lead Software Development Engineer

San Jose, CA · On-site +1

The Opportunity What are we looking for in an ideal lead front end developer? You will be joining a ... Ability to perform independently in a hybrid or remote first work environment supported by ...

2K

Lead UI Engineer

San Mateo, CA · On-site +1

$133K - $198K/yr

What We Need: We're seeking a Lead UI Engineer, to provide tech direction for our AAA multiplayer ... This includes dynamic screen layouts, remote control reordering, friction reduction, and real-time ...

E-Space

Software Integration Lead - 5G CORE

Saratoga, CA · Remote

$114K - $154K/yr

... remote SIM provisioning workflows, and profile lifecycle management across satellite and ground ... Lead and mentor a small integration engineering team (2-4 engineers); set delivery cadence and ...

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How much do remote lead flutter developer jobs pay per hour?

As of Sep 5, 2026, the average hourly pay for remote lead flutter developer in Sunnyvale, CA is $73.02, according to ZipRecruiter salary data. Most workers in this role earn between $58.94 and $84.38 per hour, depending on experience, location, and employer.

What is the difference between Remote Lead Flutter Developer vs Remote Flutter Developer?

AspectRemote Lead Flutter DeveloperRemote Flutter Developer
ResponsibilitiesLeading development teams, architecture design, project managementImplementing features, coding, debugging
Required SkillsFlutter, Dart, leadership, communication, project managementFlutter, Dart, coding, problem-solving
Work EnvironmentCollaborative team leadership, client interactionIndividual coding tasks, team collaboration
CertificationsFlutter certifications, leadership courses often preferredFlutter certifications, Dart courses

The main difference between a Remote Lead Flutter Developer and a Remote Flutter Developer lies in leadership responsibilities and project oversight. The lead role involves guiding teams, designing architecture, and managing projects, while the developer focuses on coding and feature implementation. Both roles require strong Flutter and Dart skills, but the lead position emphasizes leadership and communication skills more heavily.

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Remote Lead Flutter Developer jobs near you

Lead ASIC RTL Design Engineer

4 Staffing Corp

San Francisco, CA • On-site, Remote

Full-time

This job post has expired today. Applications are no longer accepted.

Job description

About the job Lead ASIC RTL Design Engineer

Lead ASIC RTL Design Engineer - Remote (U.S.) - No visa sponsorship

Role Summary
Our client, a leader in AI Compute is seeking a senior-level ASIC design engineer to drive the development of high-performance silicon components used in advanced compute platforms. This individual will take ownership of key IP blocks from early architectural definition through RTL delivery and signoff, working closely with cross-functional teams to meet aggressive performance, power, and area goals. The role combines hands-on design work with technical leadership and mentorship.

Core Responsibilities

Architecture & RTL Development

  • Define microarchitecture for complex subsystems and document design specifications
  • Implement high-quality, reusable RTL in System Verilog with clear interface definitions and design intent
  • Incorporate assertions and design-for-debug features within RTL

Design Ownership & Implementation

  • Lead front-end design activities including linting, clock/reset domain analysis, and synthesis readiness
  • Collaborate with physical design teams on floor planning, timing closure, and implementation tradeoffs
  • Take responsibility for achieving performance, power, and area (PPA) targets for assigned blocks

High-Speed Interfaces & Memory Systems

  • Design and integrate high-bandwidth interfaces and interconnects (e.g., AMBA-based protocols, coherent fabrics)
  • Work on memory subsystem integration, including external DRAM and high-throughput memory solutions
  • Coordinate with internal teams and third-party IP providers to ensure proper integration and functionality

Engineering Processes & Tooling

  • Establish and maintain RTL design standards, reusable components, and signoff criteria
  • Contribute to automation and workflow improvements using scripting and build systems (Python, Tcl, CI pipelines)

Collaboration & System Integration

  • Partner with verification teams on test planning, coverage goals, and model alignment
  • Work with architecture and performance engineering to validate design intent against system-level expectations
  • Support silicon bring-up, debugging, and downstream customer or system integration efforts

Technical Leadership

  • Mentor less experienced engineers and provide guidance on design best practices
  • Lead design reviews and help drive key technical decisions across teams
  • Advocate for scalable, efficient, and high-quality engineering solutions

Basic Qualifications

  • Bachelor's or Master's degree in Electrical or Computer Engineering (or similar field)
  • 8+ years of experience in ASIC or SoC RTL design for complex, high-speed devices
  • Demonstrated experience delivering designs from concept through RTL implementation and tape out readiness
  • Strong System Verilog expertise, including clocking strategies, reset design, and domain crossing considerations
  • Hands-on experience with front-end design tools and flows (linting, CDC analysis, synthesis, timing analysis, DFT)
  • Familiarity with multiple high-speed technologies such as memory interfaces, interconnect protocols, or compute data paths
  • Strong communication skills with the ability to lead technical discussions and document designs clearly

Preferred Experience

  • Exposure to AI/ML hardware or high-performance compute architectures
  • Knowledge of formal verification techniques and assertion-based design
  • Experience with power optimization methods (e.g., clock gating, power intent formats like UPF/CPF)
  • Familiarity working alongside verification environments (UVM, Python-based frameworks, or similar)
  • Understanding of modern processor subsystems, coherence models, or custom tool flows

Apply