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Remote Computer Chip Engineer Jobs in Oregon (NOW HIRING)

EnCharge AI

Principal DFT Engineer

OR · Remote

$180K - $220K/yr

Principal DFT Engineer : Developing silicon for AI Computing isn't just about speed; it's about ... POST) to ensure chip health in remote edge data centers. Implementation & Flow: Oversee scan ...

Gnostech LLC

Software Engineer (US-Remote)

OR · Remote

US-Remote or Marlton, NJ area Description A Software Engineer is needed to design, develop, and ... Bachelor's degree (in Engineering, Computer Science, Math, or related field) Minimum Years of ...

David Evans & Associates Inc

CAD Technician

Salem, OR · On-site +1

$28 - $41/hr

The Construction Engineering Services Practice is seeking a CAD Drafter / Designer in Salem, OR . (Remote possible.) We're looking for a skilled CAD Technician who thrives in a collaborative ...

BloKchain Talent, LLC

$150K - $250K/yr

Senior Back End Engineer - Blockchain (Remote) Location: Remote Worker must live within USA or ... Experience with cryptography and crypto currencies is a preferred * BS/MS Degree in Computer ...

Symbotic

Senior CAD Designer

OR · Remote

$27 - $37.25/hr

What we do The System Layout Engineering team is part of the Manufacturing and Supply Chain ... LI-Remote About Symbotic Symbotic is an automation technology leader reimagining the supply chain ...

New

ClickHouse

Senior Site Reliability Engineer- Remote

OR · Remote

$57 - $75.75/hr

You will be leveraging your software engineering expertise to develop software platforms and tools ... Bachelor's or Master's degree in Computer Science or a related field. * At least 8 years of ...

Care Access

Enterprise Performance Analytics Engineer

OR · Remote

$80K - $110K/yr

Bachelor's degree in a relevant field (e.g., Computer Science, Data Science, Statistics ... Remote within the United States. This role requires 100% of work to be performed in a remote office ...

Amat

Algorithm Engineer III Senior - (E3)

Portland, OR · On-site +1

$140K - $192K/yr

... every new chip and advanced display in the world. We design, build and service cutting-edge ... Skills and Experience MSc in Computer Science or related technical discipline. At least 3 years of ...

Quora

iOS Engineer -Remote

Salem, OR · Remote

$166K - $191K/yr

We are seeking a talented iOS Engineer to join us in building Poe, an innovative platform that ... For Toronto and Vancouver based applicants, the salary range is $166,675 - $191,397 CAD + equity ...

Quora

iOS Engineer -Remote

Eugene, OR · Remote

$166K - $191K/yr

We are seeking a talented iOS Engineer to join us in building Poe, an innovative platform that ... For Toronto and Vancouver based applicants, the salary range is $166,675 - $191,397 CAD + equity ...

Quora

iOS Engineer -Remote

Portland, OR · Remote

$166K - $191K/yr

We are seeking a talented iOS Engineer to join us in building Poe, an innovative platform that ... For Toronto and Vancouver based applicants, the salary range is $166,675 - $191,397 CAD + equity ...

Quora

iOS Engineer -Remote

Gresham, OR · Remote

$166K - $191K/yr

We are seeking a talented iOS Engineer to join us in building Poe, an innovative platform that ... For Toronto and Vancouver based applicants, the salary range is $166,675 - $191,397 CAD + equity ...

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Remote Computer Chip Engineer information

What are the key skills and qualifications needed to thrive as a Remote Computer Chip Engineer, and why are they important?

To thrive as a Remote Computer Chip Engineer, you need a strong background in electrical engineering, digital/analog circuit design, and semiconductor fundamentals, typically supported by a relevant degree. Familiarity with CAD tools like Cadence or Synopsys, experience with HDL languages (such as Verilog or VHDL), and knowledge of simulation and verification systems are essential. Excellent problem-solving, self-motivation, and effective remote communication skills set top engineers apart in virtual teams. These competencies ensure high-quality chip development, efficient collaboration, and successful project delivery in a remote work environment.

What does a Remote Computer Chip Engineer do?

A Remote Computer Chip Engineer designs, develops, tests, and optimizes microchips and integrated circuits while working from a remote location. They use specialized software tools to create blueprints, simulate chip behavior, and collaborate with other engineers online. Their work is crucial in developing faster, more efficient processors and electronic devices. By working remotely, they leverage digital communication and project management tools to coordinate with teams around the world.

What are some common challenges faced by Remote Computer Chip Engineers, and how can they be addressed?

Remote Computer Chip Engineers often face challenges related to effective collaboration, particularly when working across different time zones or with team members in various locations. Communication about design updates, debugging, and hardware testing can require extra coordination. To address these issues, teams typically use robust project management tools, regular video meetings, and clear documentation practices. Establishing strong communication channels and proactively sharing progress help ensure everyone stays aligned and projects move forward efficiently.
What are popular job titles related to Remote Computer Chip Engineer jobs in Oregon? For Remote Computer Chip Engineer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Remote Computer Chip Engineer jobs in Oregon look for? The top searched job categories for Remote Computer Chip Engineer jobs in Oregon are:
What cities in Oregon are hiring for Remote Computer Chip Engineer jobs? Cities in Oregon with the most Remote Computer Chip Engineer job openings:
Remote Computer Chip Engineer jobs near you

Principal DFT Engineer

EnCharge AI

OR • Remote

$180K - $220K/yr

Other

Posted 5 days ago

Job description

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge's robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today's best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems.

Principal DFT Engineer

Job Description:
Developing silicon for AI Computing isn't just about speed; it's about balancing high-performance data processing with extreme power efficiency and reliability in remote environments.

As a Principal DFT(Design for Test) Engineer, you will lead our testing strategy, ensuring the manufacturing quality, reliability, and test efficiency of complex, high-performance AI accelerators.

Key Responsibilities:
Architectural Leadership: Define and implement the end-to-end DFT architecture for complex SoCs, including Hierarchical DFT, Scan compression, Boundary Scan and MBIST.

Edge-Specific Reliability: Develop strategies for In-System Test (IST) and power-on self-test (POST) to ensure chip health in remote edge data centers.

Implementation & Flow: Oversee scan insertion, ATPG (Stuck-at, Transition, Path Delay), and Memory/Logic BIST.

Cross-Functional Synergy: Collaborate with Design, Physical Design, and Yield teams to ensure high test coverage while minimizing area overhead and power impact as well as timing analysis.

Post-Silicon Validation: Lead the bring-up and debug phase on ATE (Automated Test Equipment) to root-cause silicon failures and optimize test time.

Technical Requirements:
Experience: 10+ years in DFT, with at least 2 years in a leadership or principal role.

Tools: Mastery of industry-standard tools (e.g., Synopsys TestMAX, Siemens/Mentor Tessent, or Cadence Genus/Modus).

Memory & Logic Test: Deep expertise in MBIST (Memory Built-In Self-Test) with repair capabilities, SCAN, IJTAG (IEEE 1687) and boundary scan (IEEE 1149.1/6).

Advanced Nodes: Proven track record with FinFET nodes (7nm, 5nm, or below).

Low Power: Experience managing DFT in multi-voltage/power-gated designs-crucial for edge efficiency.

The salary range for this position is $180,000 to $220,000 per year. Actual compensation offered will be determined based by factors as job-related knowledge, skills and experience.

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