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Physical Design Engineer Jobs in Tempe, AZ (NOW HIRING)

Intelliswift Software

Physical Design Engineer

Phoenix, AZ · On-site

$135K - $139K/yr

Python Programming Language - * Physical Design Develop & own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability ...

RTX

Senior Mixed Signal Design Engineer

Phoenix, AZ · On-site

We bring the strength of more than 100 years of experience and renowned engineering expertise to ... Knowledge of semiconductor device physics, semiconductor processing, physical design (including the ...

Akraya Inc.

ASIC Physical Designers - IV

Chandler, AZ

$133.90K - $137.90K/yr

... , Creative and Marketing talent. Akraya has extensive experience supporting Fortune 500 and hot ... CW will assist the Physical Design Team in executing RF and analog custom layout. * Tasks include ...

Intel

Silicon Packaging Design Engineer

Phoenix, AZ

$135K/yr

Key Responsibilities: - Design and implement physical layout and routing of silicon interposers and ... Engineering, or a STEM related field Experience listed above should be in the following:

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See Tempe, AZ salary details

$92.9K

$138.4K

How much do physical design engineer jobs pay per year?

As of May 28, 2026, the average yearly pay for physical design engineer in Tempe, AZ is $136,392.00, according to ZipRecruiter salary data. Most workers in this role earn between $133,100.00 and $137,000.00 per year, depending on experience, location, and employer.

What is a Physical Design Engineer job?

A Physical Design Engineer is responsible for transforming logical circuit designs into a physical layout that can be manufactured as an integrated circuit (IC). They focus on key aspects like floor planning, placement, clock tree synthesis (CTS), routing, and timing closure while ensuring power and performance optimization. They work with Electronic Design Automation (EDA) tools and collaborate with front-end designers to meet design specifications. The role requires proficiency in tools such as Cadence, Synopsys, or Mentor Graphics and knowledge of processes like ASIC or SoC design.

What are the key skills and qualifications needed to thrive in the Physical Design Engineer position, and why are they important?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, experience with ASIC or SoC design methodologies, and a deep understanding of digital circuit fundamentals. Proficiency with EDA tools like Synopsys, Cadence, or Mentor Graphics, as well as familiarity with scripting languages and industry certifications, is highly valued. Attention to detail, effective teamwork, and strong problem-solving skills are essential soft skills for this role. These qualifications are crucial as they enable efficient chip design, ensure successful project delivery, and foster productive collaboration in complex engineering environments.

What are the typical daily responsibilities of a Physical Design Engineer?

As a Physical Design Engineer, your daily responsibilities typically include taking logical circuit designs and translating them into physical layouts, performing floorplanning, placement, and routing of blocks, and conducting timing closure and verification. You will use specialized EDA tools to ensure that designs meet performance, power, and area requirements, collaborating closely with design, verification, and manufacturing teams. The role also involves resolving design issues, optimizing chip layouts, and preparing design data for fabrication. Working in this position provides exposure to advanced technology nodes and the opportunity to contribute directly to the development of cutting-edge semiconductor products.
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Physical Design Engineer jobs near you
Physical Design Engineer

Physical Design Engineer

Intelliswift Software

Phoenix, AZ • On-site

$135K - $139K/yr

Full-time

Posted yesterday

Job description

Job ID: 21-13750 Primary Skill: Python Programming Language -
  • Physical Design Develop & own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability, floor-plan, place & route, static timing analysis, IR Drop, EM, & physical verification in advanced technology nodes Resolve design & flow issues related to physical design, identify potential solutions, & drive execution Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Min.
  • Qualifications: 0-1 yrs of exp. Enginner - CL11 & CL10 Master's degree in Electrical Eng. or Comp. Science RTL2GDSII exp. on advanced tech. nodes (7nm and below) Exp. w/low power implementation & signoff,power gating,multiple voltage rails,UPF/CPF knowled.
  • Exp. in Block-level & Full-chip floor-planning & power grid planning,w/Python, TCL,or Perl progr., working w/EDA tools like DC/Genus, ICC2/Innovus, Primetime,Redhawk/Voltus or Calibre
Additional Job Details: 1 - Hardware Troubleshooting (P1 - Beginner) | 2 - Product Verification & Validation (P1 - Beginner) | 3 - Quality Engineering Strategy and Planning (P1 - Beginner)
Primary Skill Python
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About Intelliswift

Sourced by ZipRecruiter

Intelliswift is consumed with the love for the new. Once a leading staffing company, Intelliswift now possesses the expertise to build data-rich modern platforms, and to create sophisticated systems for data management and analytics for thinking and connected enterprises. We are a global leader in delivering Digital Product Engineering, Data Management & Analytics, Cloud, Digital Enterprise and MSP/VMS staffing solutions. Led by a team of highly passionate and techno-centric innovators, we consciously embed the spirit of loving and embracing everything new in what we do. We ardently believe that companies that Love the New are at an advantage of being ahead of the curve in this age of digital.

Industry

It services

Company size

1,001 - 5,000 Employees

Headquarters location

Newark, CA, US

Year founded

2001

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