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Phase Locked Loop Circuit Design Jobs (NOW HIRING)

Beyond SOF

... design experience in at least two of the following areas of expertise: * RF and analog circuit designs implementing low-noise phase-locked-loop circuits and synthesizers, wideband automatic gain ...

SpaceX

RFIC Design Engineer (RFIC Engineering)

Irvine, CA · On-site

$145K - $175K/yr

Circuit design skills, and experience performing analysis and simulation of both linear and non-linear circuits such as phase-locked loops, vector modulators/demodulators, oscillators, mixers ...

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Phase Locked Loop Circuit Design information

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$11K

$214K

How much do phase locked loop circuit design jobs pay per year?

As of Jun 15, 2026, the average yearly pay for phase locked loop circuit design in the United States is $212,797.00, according to ZipRecruiter salary data. Most workers in this role earn between $212,500.00 and $213,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Phase Locked Loop (PLL) Circuit Designer, and why are they important?

To thrive as a Phase Locked Loop Circuit Designer, you need expertise in analog and digital circuit design, signal processing, and a degree in electrical or electronics engineering. Familiarity with EDA tools like Cadence, SPICE simulation, and experience with lab measurement equipment are typically required. Strong problem-solving skills, attention to detail, and effective communication set top designers apart in this role. These abilities are crucial for developing precise, reliable PLL circuits that meet stringent performance requirements in applications like communications and clock generation.

What is Phase Locked Loop (PLL) circuit design?

Phase Locked Loop (PLL) circuit design refers to the process of creating electronic circuits that synchronize an output signal's phase and frequency with a reference signal. PLLs are widely used in applications such as frequency synthesis, clock generation, and demodulation in communication systems. Designing a PLL involves selecting and configuring components like phase detectors, voltage-controlled oscillators (VCOs), and loop filters to achieve desired performance characteristics such as stability, locking range, and phase noise. Successful design requires a solid understanding of control theory and analog/digital circuit principles.

What are some typical challenges faced when designing Phase Locked Loop (PLL) circuits, and how do engineers address them?

Engineers designing Phase Locked Loop circuits often encounter challenges such as minimizing phase noise, managing loop stability, and handling power consumption. Achieving optimal loop bandwidth without compromising noise performance requires careful component selection and simulation. Collaboration with analog, digital, and RF teams is common to ensure the PLL integrates seamlessly into larger systems. Engineers also routinely use advanced design and verification tools to iterate on layouts and validate performance against stringent specifications.

What is the difference between Phase Locked Loop Circuit Design vs RF Circuit Design?

AspectPhase Locked Loop Circuit DesignRF Circuit Design
Required CredentialsBachelor's or higher in Electrical Engineering, specialized in analog/digital circuitsBachelor's or higher in Electrical Engineering, with focus on RF and microwave engineering
Work EnvironmentDesign labs, simulation software, testing on prototypesTest labs, RF measurement equipment, simulation tools
Industry UsageCommunications, signal processing, timing systemsWireless communication, radar, satellite systems
Common Search/ComparisonYesYes

While both roles involve high-frequency circuit design, Phase Locked Loop Circuit Design focuses on synchronization and frequency control systems, whereas RF Circuit Design emphasizes the development of radio frequency components and systems. Understanding the differences helps professionals target their skills and career paths effectively.

Infographic showing various Phase Locked Loop Circuit Design job openings in the United States as of June 2026, with employment types broken down into 8% Internship, 75% Full Time, and 17% Contract. Highlights an 100% In-person job distribution, with an average salary of $212,797 per year, or $102.3 per hour.
Analog Design, Sr.Staff Engineer-15024

Analog Design, Sr.Staff Engineer-15024

Synopsys

Boxborough, MA • On-site

$136K/yr

Full-time

Posted 17 days ago

Job description

General Information
Job Title
Analog Design, Sr.Staff Engineer-15024
Job ID
15024
City
Boxborough
State/Province
Massachusetts
Date Posted
29-Jan-2026
Job Category
Engineering
Job Subcategory
Analog Design
Hire Type
Employee
Remote Eligible
No
Base Salary Range: $136000 - $204000
Descriptions & Requirements
Job Description and Requirements
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team developing high speed (>200Gbps) analog integrated circuits in the latest FinFET process nodes. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.
You Are:
You are an accomplished analog design engineer with a passion for pushing the boundaries of high-speed connectivity. You thrive on solving complex technical challenges and are energized by collaborating with cross-functional teams to deliver best-in-class silicon solutions. Your expertise in SerDes and high-speed analog circuit design is complemented by your hands-on experience in developing, verifying, and optimizing circuits for high performance, low power, and minimal area. You are deeply familiar with the intricacies of CMOS design, and have a proven track record of successfully taping out silicon-proven designs for modern communication interfaces. You are detail-oriented, with a rigorous approach to design documentation and verification, and you communicate complex technical concepts with clarity to both peers and customers. You are comfortable navigating the entire design flow, from architectural review and specification through layout, simulation, and silicon validation. Above all, you are motivated by the impact your work has on the industry and on the innovative products that shape the world.
What You'll Be Doing:
  • Ownership of Analog Macro level design
  • Tracking and reviewing the work of sub-block owners
  • Review SerDes standards and architecture documents to develop analog specifications
  • Identify and refine circuit implementations to achieve optimal power, area and performance targets.
  • Propose design and verification strategies that efficiently use simulator features to ensure highest quality design.
  • Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.
  • Collaborate with digital RTL engineers on the development of calibration, adaptation and control algorithms for analog circuits.
  • Present simulation data for peer and customer review.
  • Mentor and review the progress of junior engineers.
  • Document design features and test plans.
  • Consult on the electrical characterization of your circuit within the SerDes IP product.

What You'll Need:
  • Advanced degree with 6+ years of SerDes/High-Speed analog design experience.
  • In-depth familiarity with transistor level circuit design - sound CMOS design fundamentals.
  • Silicon-proven experience implementing circuits for the TX, RX and Clock paths within a SerDes
  • Experience in leading a small team of designers collaborating on building blocks of a Macro level design
  • Detailed design experience with several of the following SerDes sub-circuits:
    receive equalizers, data samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase interpolator, delay-locked loop, phase-locked loop, bandgap reference, ADC, DAC
  • Experience optimizing FinFET CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects.
  • Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.).
  • Experience with EDA tools for schematic entry, physical layout, and design verification.
  • Knowledge of SPICE simulators and simulation methods.
  • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
  • Experience with TCL, Perl, C, Python, MATLAB.

Who You Are:
  • Innovative, analytical, and detail-oriented problem solver.
  • Effective communicator with strong presentation and documentation skills.
  • Collaborative team player who thrives in multidisciplinary environments.
  • Motivated mentor and coach for junior engineers.
  • Adaptable to changing project requirements and new technologies.
  • Self-driven and committed to continuous professional development.

The Team You'll Be A Part Of:
You will join a high-impact analog/mixed-signal design team renowned for delivering state-of-the-art SerDes IP solutions. The team's focus is on innovation, quality, and collaboration, working closely with digital design, layout, verification, and product engineering teams. Together, you will tackle complex design challenges, develop next-generation connectivity IP, and support customers worldwide in deploying industry-leading silicon solutions.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
#LI-NK4
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
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About Synopsys

Sourced by ZipRecruiter

Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software partner for creative companies developing the electronic products and software applications we rely on every single day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer building advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver exceptional, secure products for the era of connected everything. The company is headquartered in Mountain View, California, and has approximately 113 offices located throughout North America, South America, Europe, Japan, Asia and India. Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every single day.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Mountain View, CA, US

Year founded

1986

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