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Nvidia Power Analysis Engineer Jobs (NOW HIRING)

Qualcomm

GPU Power Analysis Engineer

San Diego, CA · On-site

$87K - $116K/yr

... analyze performance and power from silicon measurements, have understanding of different SOC components (such as CPU, GPU, DDR, path-to-DDR) and a strong programming background. Minimum Skills:

Qualcomm

Senior CPU Power Analysis Engineer

Austin, TX · On-site

$122K - $183K/yr

Qualcomm Engineers collaborate with cross-functional teams to design, verify, and implement multi-core CPU operations for all Qualcomm Business Units. Job Overview: * Power analysis on a project ...

Qualcomm

Senior CPU Power Analysis Engineer

Austin, TX · On-site

$122K - $183K/yr

Qualcomm Engineers collaborate with cross-functional teams to design, verify, and implement multi-core CPU operations for all Qualcomm Business Units. Job Overview: * Power analysis on a project ...

Nvidia

Senior DFT Power Methodology Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... You will work on post-silicon data analysis for power to architect the next-gen solutions. * In ...

Nvidia

Senior DFT Power Methodology Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... You will work on post-silicon data analysis for power to architect the next-gen solutions. * In ...

Nvidia

Senior Failure Analysis Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

NVIDIA is seeking a software-focused Senior Failure Analysis Engineer who can blend deep ... power failure analysis, debug, and engineering insight at scale. You'll own the reliability and ...

Nvidia

Senior Failure Analysis Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

NVIDIA is seeking a software-focused Senior Failure Analysis Engineer who can blend deep ... power failure analysis, debug, and engineering insight at scale. You'll own the reliability and ...

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Nvidia Power Analysis Engineer information

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$80K

$113K

$142.5K

How much do nvidia power analysis engineer jobs pay per year?

As of Sep 14, 2026, the average yearly pay for nvidia power analysis engineer in the United States is $113,035.00, according to ZipRecruiter salary data. Most workers in this role earn between $97,500.00 and $127,500.00 per year, depending on experience, location, and employer.

What does an Nvidia Power Analysis Engineer do?

An Nvidia Power Analysis Engineer is responsible for evaluating and optimizing the power consumption of Nvidia’s hardware products, such as GPUs and SoCs. They analyze power usage at various stages of the design process, run simulations, and propose improvements to enhance energy efficiency while maintaining high performance. This role involves close collaboration with hardware designers, architects, and verification teams to ensure products meet tight power budgets and industry standards. Power Analysis Engineers also use specialized tools to model, measure, and report on power metrics throughout development.

What are the key skills and qualifications needed to thrive as an Nvidia Power Analysis Engineer?

To thrive as an Nvidia Power Analysis Engineer, you need a strong background in electrical or computer engineering, with expertise in power modeling, circuit analysis, and ASIC/SoC design. Familiarity with EDA tools like PrimeTime PX, PowerArtist, and scripting languages such as Python or Perl, along with knowledge of power estimation methodologies, is typically required. Excellent problem-solving abilities, attention to detail, and effective communication are crucial soft skills for collaborating with cross-functional teams and innovating power-efficient designs. These skills and qualities are vital for optimizing power consumption, improving chip performance, and ensuring product competitiveness in the semiconductor industry.

What are some common challenges faced by Nvidia Power Analysis Engineers during the design and verification process?

Nvidia Power Analysis Engineers often encounter challenges related to accurately estimating power consumption in complex, high-performance chips. These include dealing with constantly evolving design specifications, integrating power analysis tools into fast-paced development cycles, and balancing power efficiency with performance requirements. Collaborating closely with design, verification, and software teams is essential to identify critical power hotspots early and suggest optimizations. Staying updated with the latest EDA tools and methodologies is also key to overcoming these challenges and ensuring successful chip tape-out.

What is the difference between Nvidia Power Analysis Engineer vs Nvidia Hardware Validation Engineer?

AspectNvidia Power Analysis EngineerNvidia Hardware Validation Engineer
Primary FocusAnalyzing and optimizing power consumption and efficiency of Nvidia hardwareTesting and validating hardware components for functionality and performance
Required SkillsPower analysis tools, electrical engineering, scripting, hardware understandingHardware testing, debugging, test automation, electrical and mechanical knowledge
Work EnvironmentDesign labs, power measurement setups, simulation environmentsTest labs, hardware testing stations, validation labs
Industry UsageDesign and optimization of GPUs, SoCs, and related hardwareEnsuring hardware quality and reliability before product release

The Nvidia Power Analysis Engineer focuses on analyzing and optimizing power consumption in Nvidia hardware, while the Nvidia Hardware Validation Engineer concentrates on testing and validating hardware components for quality and performance. Both roles require electrical engineering skills and work in hardware-focused environments, but their core responsibilities differ significantly.

What are popular job titles related to Nvidia Power Analysis Engineer jobs?

For Nvidia Power Analysis Engineer jobs, the most frequently searched job titles are:

Infographic showing various Nvidia Power Analysis Engineer job openings in the United States as of September 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $113,035 per year, or $54.3 per hour.

Senior Power Analysis and Optimization Engineer

Austin, TX • On-site

Nvidia
Computer and Electronic Product Manufacturing • 10K+ employees
Learn more about Nvidiaexternal

$103K - $142K/yr

Full-time

Re-posted 23 days ago

Key responsibilities

  • Analyze fullchip and unitlevel power using industry-standard RTL and gatelevel power tools and translate data into design and architectural improvements.

  • Develop and productionize power-aware models and flows, including ML/RL-based techniques for anomaly detection, dynamic power management, and design space exploration.

  • Prototype and evaluate new architectural features in Verilog with a focus on their power and energy implications.

Nvidia rating

9.6

Company rating: 9.6 out of 10

Based on 18 frontline employees who took The Breakroom Quiz

Job description

We're looking for a Senior Power Architecture & Optimization Engineer to push the limits of energy efficiency using advanced analytics and AI, including LLMs trained specifically for power analysis.

NVIDIA's leadership in accelerated computing depends on building the most energyefficient GPUs and SoCs in the industry. As AI and graphics workloads scale explosively, we believe that Power Analysis and Optimization driven by AI and LLMs is the future-and a key differentiator for our next generations of GPUs and Tegra SoCs. In this role, you'll be at the center of that effort-combining power architecture expertise with machine learning, reinforcement learning, data analytics, and large language models (LLMs) to invent new ways to model, analyze, and optimize energy consumption across fullchip and unitlevel designs.

What You'll Be Doing:

  • Analyze fullchip and unitlevel power using internal and industrystandard RTL and gatelevel power tools, and translate data into concrete design and architectural improvements.

  • Develop and productionize poweraware models and flows, including ML/RLbased techniques for anomaly detection, dynamic power management, and designspace exploration.

  • Design and train new LLMs that "learn the art" of power analysis from design data, power reports, bug histories, and best practices-so they can:

    • Assist engineers in interpreting complex power data

    • Propose likely root causes and candidate fixes

    • Recommend architectural and microarchitectural optimizations for power

  • Perform comparative power analysis across workloads, products, and design options to identify trends, anomalies, and optimization opportunities that aren't obvious from first principles alone.

  • Partner closely with Architects, Performance, Software, ASIC Design, and Physical Design teams to interpret power data, rootcause power bugs, and drive fixes and design changes.

  • Prototype and evaluate new architectural features in Verilog, with a strong focus on their power and energy implications.

  • Automate and scale flows (Python/Perl/C++), and define new pipelines that fasttrack power anomaly detection and close the loop between power data, AI models, and design decisions.

  • Apply AI to power optimization: build and deploy datadriven models-using machine learning, reinforcement learning, data analytics, and custom LLMs-to recommend or automatically tune powerefficient configurations and policies.

What We Need To See:

  • MS (or equivalent experience) and 5yrs experience OR PHD + 3yr experience in EE/CE/CS or related fields.

  • Strong understanding of energy consumption, power estimation, data movement, and lowpower design.

  • Familiarity with Verilog and ASIC design principles, and handson experience with tools such as PowerArtist, PrimePower/PrimePower RTL, RTL Architect, or similar.

  • Solid coding and automation skills, preferably in Python, Perl, and C++.

  • Experience or strong interest in machine learning, reinforcement learning, and data analytics, ideally applied to EDA, architecture, or systemlevel optimization.

  • Interest or experience in building and using LLMs or other foundation models as engineering copilots-especially for EDA/power/architecture workflows.

  • Excellent communication and collaboration skills to work effectively with crossfunctional design and architecture teams.

  • A genuine desire to bring datadriven, AIassisted decisionmaking into power architecture and help shape the energy profile of NVIDIA's future products.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until May 26, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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Hours and flexibility

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About Nvidia

Sourced by ZipRecruiter

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

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