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Nand Design Engineer Jobs (NOW HIRING)

Principal Design Engineer

San Jose, CA · On-site

$145K - $298K/yr

JR94425 Principal Design Engineer Our vision is to transform how the world uses information to ... Architect NAND Xpath, Ypath, algorithms, waveforms, drive alignment of design solutions ...

Role Overview As a Senior Design Engineer (or Staff Design Engineer) in the NVE Design Engineering ... This requires in‑depth familiarity with NAND Flash read, program and erase algorithms, and how ...

Senior Design Engineer

San Jose, CA · On-site

$116K - $246K/yr

Role Summary As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron ... Design, simulate, optimize, and floorplan NAND analog and mixed‑signal circuits, including ...

Principal Design Engineer

San Jose, CA · On-site

$176K - $298K/yr

As a Principal Design Engineer in the NVE Design Engineering Core group at Micron Technology, Inc ... Collaborate on architecting NAND Xpath, Ypath, algorithms, waveforms, drive alignment of design ...

NAND Product Engineer

Cupertino, CA · On-site

$159K - $191K/yr

Minimum Qualifications BS degree Experience in NAND development, specifically with product engineering, design, and/or process integration aspects of the technology Experience with NAND failure ...

NAND Product Engineer

Cupertino, CA · On-site

$159K - $191K/yr

S. degree Experience in NAND development, specifically with product engineering, design, and/or process integration aspects of the technology Experience with NAND failure analysis, testing and/or ...

Design, plan, and execute NAND memory cell and array characterization experiments to evaluate ... Qualifications Required Qualifications: * Master's or PhD in Electrical Engineering ...

Design, plan, and execute NAND memory cell and array characterization experiments to evaluate ... Qualifications Required Qualifications: * Master's or PhD in Electrical Engineering ...

Requires MS or BS degree in Electrical Engineering or equivalent with 5 or more years of relevant experience. * Knowledge and/or experience in memory design (DRAM memory, NAND flash memory cell ...

NAND CORE Design Engineer

Milpitas, CA · On-site

$166K - $282K/yr

Requires MS or BS degree in Electrical Engineering or equivalent with 5 or more years of relevant experience. * Knowledge and/or experience in memory design (DRAM memory, NAND flash memory cell ...

... design, and/or process integration aspects of the technology Experience with NAND failure analysis, testing and/or debug efforts Pay & Benefits At Apple, base pay is one part of our total ...

Requires MS or BS degree in Electrical Engineering or equivalent with 5 or more years of relevant experience. * Knowledge and/or experience in memory design (DRAM memory, NAND flash memory cell ...

As aPrincipalDesign Engineer in the NVE Design EngineeringCoregroup at Micron Technology, Inc., you ... Serve as a technical authority in the analog/corefunctional team for NAND projects,participatingin ...

NAND Product Engineer

Cupertino, CA · On-site

$144K - $263K/yr

S. degree Experience in NAND development, specifically with product engineering, design, and/or process integration aspects of the technology Experience with NAND failure analysis, testing and/or ...

NAND Product Engineer

Cupertino, CA · On-site

$175K - $311K/yr

Experience in NAND development, specifically with product engineering, design, and/or process integration aspects of the technology * Experience with NAND failure analysis, testing and/or debug ...

$175K - $311K/yr

Experience in NAND development, specifically with product engineering, design, and/or process integration aspects of the technology * Experience with NAND failure analysis, testing and/or debug ...

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How much do nand design engineer jobs pay per hour?

As of Sep 11, 2026, the average hourly pay for nand design engineer in the United States is $50.69, according to ZipRecruiter salary data. Most workers in this role earn between $39.18 and $61.78 per hour, depending on experience, location, and employer.

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Infographic showing various Nand Design Engineer job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $105,435 per year, or $50.7 per hour.

Principal Design Engineer

San Jose, CA • On-site

Micron Technology
Semiconductor and Electronic Component Manufacturing • 10K+ employees

$145K - $298K/yr

Other

Medical, Dental, Vision, PTO

Re-posted 21 days ago


Micron Technology rating

8.6

Company rating: 8.6 out of 10

Based on 43 frontline employees who took The Breakroom Quiz


Job description

Req ID: JR94425 Principal Design Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a Principal Design Engineer in the NVE Design Engineering Core group at Micron Technology, Inc., you will contribute to the development of memory products that are best‑in‑class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products!

Responsibilities
  • Serve as a technical authority in the analog/core functional team for NAND projects, participating in pathfinding activities and solving sophisticated technical problems.
  • Architect NAND Xpath, Ypath, algorithms, waveforms, drive alignment of design solutions, methodologies, DTCO and circuits, including detailed competitive analysis (CA) across a distributed matrix organization, working closely with other functional teams to evaluate, analyze, and improve NAND power consumptions, across geographies and time zones!
  • Coordinate project planning according to achievements, ensuring tasks are completed on time.
  • Design, simulate, optimize, and floor plan NAND circuits, evaluate design feasibility and analyze circuit functionalities. Perform die size cost and benefits analysis of new array circuits and algorithms prior to implementation.
  • Implement analog and mixed signal circuit design to meet specifications, validate design performance and functionalities by running block and chip level simulations using standard industry simulators and mentor other engineers for the same.
  • Collaborate productively with other team members in your team.
  • Build and maintain Python‑based AI utilities that collaborate with EDA environments to accelerate design tasks such as environment setup, corner execution, regression runs, automated documentation and intelligent/predictive design/layout techniques.
  • Review existing and create new user documentation.
  • Work with and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time‑to‑market, and customer satisfaction.
Minimum Qualifications
  • MS (PhD preferred) in electrical engineering required.
  • 8+ years of NAND design relevant proven experience required with proficient knowledge of NAND Flash memory read, program and erase algorithms.
  • A very high level of self‑motivation and proactivity.
  • Proficiency in analog/mixed signal circuit design (page buffers, block selectors, Xdecoder, Ydecoder, bias table and waveforms, PDNs, level shifters, IO buffers, RTL, Verilog).
  • Proficient fundamentals in semiconductor and device physics and analog/mixed‑signal circuit design. An understanding of semiconductor reliability issues including CHC, NBTI, stress, and snapback, as well as Electromigration (EM) and IR analysis.
  • Proficient circuit debugging and problem‑solving skills.
  • Proficiency in circuit verification and optimization, layout planning, parasitic extractions of the circuits, experience guiding layout.
  • Proficient in analog and digital simulators such as HSPICE, Fast SPICE, and Verilog.
  • Proficient coding skills in Python (plus Bash/Tcl a bonus), and proficient working with structured data (CSV/JSON/SQLite) and version control.
  • Proficient with Cadence design, LVS/DRC tools and UNIX.
  • Excellent teamwork attitude. Good verbal communication skills (English) and ability to convey sophisticated technical concepts in verbal and written form.
Job Profile(s)

Semiconductor Design Engineer 4 - Semiconductor Design Engineer 5

Relocation Level

TBD

Salary

US base salary range: $145,000.00 – $298,000.00 per year. Additional compensation may include benefits, bonuses and equity.

The salary range is determined by role, level, and location. The specific pay for a preferred location will be determined by a recruiter during the hiring process.

Benefits

Micron offers a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the Benefit programs available, please review the Benefits Guide posted on Micron Technology, Inc.

EEO Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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