ZipRecruiter

Log In

1

Memory Lane Jobs in California (NOW HIRING)

Quadric

AI Performance Modeling Engineer

Burlingame, CA · On-site

$180 - $225/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

These models directly guide team decisions on hardware lane bindings, tensor placement, and ... Model tensor placement, tiling across processing elements, local memory residency, and data ...

quadric, Inc

AI Performance Modeling Engineer

Burlingame, CA

$180K - $225K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

These models directly guide team decisions on hardware lane bindings, tensor placement, and ... Model tensor placement, tiling across processing elements, local memory residency, and data ...

Mem0

Full Stack Engineer

San Francisco, CA · On-site

$150K - $250K/yr

  • Medical

  • Dental

  • Vision

  • PTO

Think long-term memory that enables AI to remember conversations, learn from interactions, and ... Go beyond your lane: Unblock teammates, embrace new technologies, and do whatever it takes to ...

quadric, Inc

AI Performance Modeling Engineer

Burlingame, CA · On-site

$180K - $225K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

These models directly guide team decisions on hardware lane bindings, tensor placement, and ... Model tensor placement, tiling across processing elements, local memory residency, and data ...

quadric, Inc

AI Performance Modeling Engineer

Burlingame, CA · On-site

$180K - $225K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

These models directly guide team decisions on hardware lane bindings, tensor placement, and ... Model tensor placement, tiling across processing elements, local memory residency, and data ...

Lightfield

Founding Growth & Delivery Lead

San Francisco, CA · On-site

$170K - $200K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

You'll work directly with founders and their teams to build their customer memory on Lightfield ... You don't wait to be handed a lane and instead figure out what needs to happen and do it * A ...

previous pagenext page

Showing results 21-40

All JobsMemory Lane JobsMemory Lane Jobs in California

Memory Lane information

What is a Memory Lane job?

Memory Lane jobs typically refer to roles within companies or organizations that focus on preserving, archiving, and sharing personal or collective memories. These positions may involve working with digital archives, curating historical content, or developing platforms that help individuals and communities remember and celebrate their past. Professionals in these roles often have backgrounds in history, archival science, digital media, or storytelling. They play a key role in ensuring important memories are documented, accessible, and meaningful for future generations.

What skills and qualifications are needed to thrive as a Memory Lane professional?

I'm sorry, but 'Memory Lane' is not recognized as a real-world professional occupation, so I cannot provide an answer to your question.

What are common challenges faced by professionals working in memory care roles within senior living communities?

Professionals working in memory care often encounter challenges such as managing residents' behavioral changes, ensuring safety for individuals with dementia, and maintaining consistent communication with family members. The role requires patience, adaptability, and strong interpersonal skills to provide compassionate care and support to residents experiencing memory loss. Teamwork is essential, as staff members collaborate closely to develop individualized care plans and respond effectively to residents' evolving needs.

What is the difference between Memory Lane vs Archivist?

AspectMemory LaneArchivist
Required CredentialsTypically high school diploma or equivalent; some roles may require certification in digital archivingBachelor's degree in history, library science, or related field; often requires certification in archival management
Work EnvironmentMuseums, historical societies, or digital platformsArchives, libraries, museums, or government agencies
Industry UsageUsed in cultural, historical, and digital memory preservation contextsCommonly employed in preserving and managing historical records and documents
Search & Comparison IntentPeople comparing roles related to memory preservation and digital archiving

Memory Lane and Archivist roles both involve preserving history and records, but Memory Lane often refers to digital or informal memory preservation, while Archivists focus on managing official records in professional settings. The choice depends on the work environment and credentials required.

What are the most commonly searched types of Memory Lane jobs in California?

The most popular types of Memory Lane jobs in California are:

Memory Lane jobs near you
Infographic showing various Memory Lane job openings in California as of August 2026, with employment types broken down into 79% Full Time, and 21% Part Time. Highlights an 93% In-person, and 7% Remote job distribution.

Optical Interconnect System Integration and Qualification Engineer

Advanced Micro Devices, Inc

Santa Clara, CA • On-site

$165K/yr

Full-time

Re-posted 3 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 159 rated electronics manufacturers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
We are seeking a highly experienced Optical Interconnect System Integration and Qualification Engineer to lead system-level integration, validation, and qualification of next-generation optical and high-speed electrical interconnects for AI scale-out and scale-up platforms.
This role combines hands-on optical transceiver qualification with broader system integration responsibilities spanning optics, SerDes, signal integrity, power integrity, firmware, ASICs, boards, and complete platform architectures. The ideal candidate brings deep expertise in 400G, 800G, and emerging 1.6T optical interconnects, 100G and 200G per-lane PAM4 technologies, CMIS validation, SerDes optimization, lab characterization, and cross-functional system debug.
You will work closely with architecture, ASIC, SI/PI, diagnostics, firmware, platform engineering, and external vendor teams to drive qualification readiness, improve link performance, and influence future optical interconnect solutions including pluggable optics, onboard optics, co-packaged optics, and next-generation high-density system integration technologies.
THE PERSON:
The successful candidate is a hands-on technical leader with strong expertise in optical networking, high-speed electrical interconnects, and system qualification. You have a proven track record of driving complex cross-functional validation efforts, resolving challenging system-level issues, and delivering robust, production-ready interconnect solutions for next-generation AI and data center platforms.
You thrive in a fast-paced engineering environment, possess exceptional debugging and analytical skills, and can effectively communicate technical findings and recommendations across engineering organizations and leadership teams.
KEY RESPONSIBILITIES:
  • Lead optical transceiver and cable qualification activities at both module and system levels for high-speed AMD platforms.
  • Develop and execute qualification plans for 400G, 800G, and 1.6T optical transceivers, DACs, AECs, and related interconnect technologies.
  • Perform electrical, optical, protocol, and system-level validation of 100G and 200G per-lane PAM4 links.
  • Drive host-side SerDes optimization, including equalization tuning, margining, BER testing, eye analysis, FEC evaluation, and link stability characterization.
  • Support system-level integration of pluggable optics, onboard optics, co-packaged optics, and emerging interconnect technologies.
  • Debug and resolve complex issues spanning ASICs, boards, connectors, cages, cables, optical modules, firmware, diagnostics, and software layers.
  • Validate compliance with industry specifications including CMIS, MSA requirements, management interfaces, diagnostics, memory maps, and module state machines.
  • Perform optical and electrical characterization using advanced laboratory equipment such as DCA-X, BERTs, real-time oscilloscopes, optical spectrum analyzers, optical power meters, and compliance tools.
  • Collaborate with SI/PI teams to evaluate channel performance, jitter margin, signal integrity, power integrity, and overall link behavior.
  • Provide hands-on support during platform bring-up, characterization, compliance testing, and root-cause investigations.
  • Partner with ASIC, firmware, diagnostics, software, and platform teams to improve validation methodologies, automation frameworks, and debug workflows.
  • Develop Python-based automation solutions for test execution, data collection, analysis, characterization, and reporting.
  • Drive issue resolution and qualification closure with external optics vendors and ecosystem partners.
  • Influence future platform architectures by providing recommendations on optics selection, SerDes requirements, thermal considerations, power constraints, and integration tradeoffs.
  • Document qualification results, risk assessments, recommendations, and technical findings for engineering and executive reviews.

PREFERRED QUALIFICATIONS:
  • 8+ years of experience in optical networking, high-speed data communications, hardware validation, SerDes validation, or system-level interconnect qualification.
  • Deep hands-on experience with 100G and 200G per-lane optical transceivers and high-speed interconnect solutions.
  • Expertise with QSFP-DD, QSFP112, OSFP, 400G, 800G, and 1.6T optical technologies.
  • Strong understanding of optical transceiver architectures and their impact on overall system performance.
  • Experience with host-side SerDes tuning, including TX/RX equalization, eye diagrams, jitter analysis, BER testing, FEC, link training, and margin characterization.
  • Familiarity with industry specifications including IEEE, OIF, CMIS, SFF-8636, and related MSA standards.
  • Experience with I2C-based module management interfaces, diagnostics, alarms, memory maps, state machines, and module control sequencing.
  • Hands-on experience with DCA, BERT, real-time oscilloscopes, OSA, optical power meters, VNA/TDR systems, and compliance test infrastructure.
  • Strong understanding of Signal Integrity (SI) and Power Integrity (PI) fundamentals, including insertion loss, return loss, crosstalk, jitter, eye closure, channel margin, and power-rail noise.
  • Experience working across both host-side and module-side aspects of high-speed optical and electrical links.
  • Proven track record supporting system bring-up and debug across ASIC, board, firmware, software, optics, and platform teams.
  • Python programming skills for automation, data analysis, visualization, and reporting.
  • Excellent problem-solving skills with the ability to navigate complex cross-disciplinary issues.
  • Strong written and verbal communication skills with the ability to present technical findings to engineering teams and senior leadership.
  • Experience collaborating with optics vendors, customers, and ecosystem partners.
  • Exposure to next-generation technologies such as silicon photonics, co-packaged optics, onboard optics, co-packaged copper, near-package optics (NPO), and external-laser-source architectures is highly desirable.

ACADEMIC CREDENTIALS:
  • B.S. or M.S. in Electrical Engineering, Optical Engineering, Computer Engineering, Physics, Photonics, or a related technical discipline.
  • Ph.D. or equivalent industry experience is a plus.

LOCATION: Santa Clara, California (Onsite)
#LI-RF1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

What Advanced Micro Devices employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

Apply