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Memory Design Engineer Jobs in Houston, TX (NOW HIRING)

... design * Performance analysis tools, telemetry, and data-driven evaluation * Prior experience engaging with memory or silicon vendors in a technical or architectural capacity * Programming:

Embedded Software Engineer

TX

$120K - $158K/yr

... memory, interfaces, sensors, and communication devices. Main Duties and Responsibilities ... Software Design & Development โ€ข Develop, code, test, and debug new embedded software or ...

Senior AI Engineer

Houston, TX ยท On-site

$99K - $137K/yr

The Senior AI Engineer will lead the design and implementation of production-grade AI solutions ... Develop context and memory systems (retrieval, summarization, session continuity) Evaluation ...

Senior AI Agentic Engineer

Spring, TX ยท On-site

$93K - $127K/yr

Senior AI Agentic Engineer Location: Spring, TX 77389 (hybrid: 3 days onsite / 2 days remote ... Design, build, and deploy end-to-end agentic AI systems using LLMs, tools, memory, and planning ...

We design and engineer the platforms, runtimes, and developer tooling that make autonomous AI ... Engineer multi-tier memory architectures spanning in-process working memory, cross-session ...

Ability to design tool-augmented agents (function calling, retrieval-augmented generation, memory systems, planning/execution loops). Experience with prompt engineering, evaluation, and guardrails ...

Ability to design tool-augmented agents (function calling, retrieval-augmented generation, memory systems, planning/execution loops). Experience with prompt engineering, evaluation, and guardrails ...

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Memory Design Engineer information

See Houston, TX salary details

$76.8K

$134.9K

$277.3K

How much do memory design engineer jobs pay per year?

As of Jul 16, 2026, the average yearly pay for memory design engineer in Houston, TX is $134,923.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,700.00 and $150,800.00 per year, depending on experience, location, and employer.

What are the primary challenges faced by Memory Design Engineers on a daily basis?

Memory Design Engineers often encounter challenges such as optimizing memory circuits for speed, power efficiency, and area while ensuring manufacturability and meeting reliability standards. Balancing these conflicting requirements requires strong analytical skills and close collaboration with verification, process, and layout teams. The role also involves troubleshooting design issues, staying updated with evolving semiconductor technologies, and ensuring timely project delivery. Overcoming these challenges fosters professional development and helps engineers build a solid track record in advanced technology nodes.

What are the key skills and qualifications needed to thrive in the Memory Design Engineer position, and why are they important?

A Memory Design Engineer requires a strong background in electrical engineering, semiconductor physics, and digital/analog circuit design, typically supported by a relevant bachelor's or master's degree. Expertise with EDA tools like Cadence, Synopsys, or Mentor Graphics, and familiarity with scripting languages and memory characterization tools is essential. Strong problem-solving skills, attention to detail, and effective communication are important soft skills in this role. These competencies are crucial to ensure reliable, high-performance memory designs that meet rigorous industry standards and enable smooth collaboration within multidisciplinary engineering teams.

What engineers make $500,000?

Senior memory design engineers, especially those with extensive experience, specialized skills in semiconductor design, and advanced certifications, can earn $500,000 or more annually. High compensation is often associated with leadership roles, working at major tech or semiconductor companies, and involvement in high-stakes projects requiring deep technical expertise.

What engineers make $200,000 a year?

Memory Design Engineers, especially those with extensive experience, advanced skills in semiconductor design, and certifications, can earn $200,000 or more annually. Salaries vary based on industry, location, and company size, with senior roles often reaching this level in high-tech sectors. Expertise in EDA tools and a strong understanding of memory architectures are also important factors.

What is the role of a memory design engineer?

A memory design engineer develops and optimizes memory components such as RAM, flash, and cache for electronic devices. They work with circuit design, semiconductor fabrication, and simulation tools to ensure memory performance, reliability, and power efficiency meet specifications. Strong knowledge of digital design, VLSI, and industry standards is essential for this role.

What is a Memory Design Engineer job?

A Memory Design Engineer is responsible for designing, developing, and optimizing memory circuits such as SRAM, DRAM, or flash memory. They work on transistor-level design, layout, simulation, and verification to ensure performance, power efficiency, and reliability. Engineers collaborate with process, verification, and product teams to meet design specifications and manufacturing constraints. Their role is critical in advancing memory technology for applications in consumer electronics, computing, and enterprise solutions.

What engineers make $300,000 a year?

Senior Memory Design Engineers in the semiconductor industry can earn $300,000 or more annually, especially with extensive experience, advanced skills in VLSI design, and certifications. High-level roles in technology companies or specialized fields like chip architecture often offer such compensation packages.
What are popular job titles related to Memory Design Engineer jobs in Houston, TX? For Memory Design Engineer jobs in Houston, TX, the most frequently searched job titles are:
What job categories do people searching Memory Design Engineer jobs in Houston, TX look for? The top searched job categories for Memory Design Engineer jobs in Houston, TX are:
Infographic showing various Memory Design Engineer job openings in Houston, TX as of July 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $134,923 per year, or $64.9 per hour.
Systems Architect: Memory Wall Exploration

Systems Architect: Memory Wall Exploration

HP Development Company, L.P.

Spring, TX โ€ข On-site

$147K - $230K/yr

Full-time

Medical, Dental, Vision, Life, PTO

Re-posted 2 days ago


Job description

Systems Architect: Memory Wall Exploration
Description -
Job Summary:
The Systems Architect: Memory Wall Exploration focuses on understanding how AI execution interacts with platform resources, particularly memory hierarchy, data movement, and shared-memory behavior across heterogeneous compute environments (CPU, GPU, AI accelerators). The architect will engage with internal teams and external partners (including memory and silicon vendors) to translate low-level technical characteristics into system-level guidance and platform strategy for HP.
Key Responsibilities
Platform Performance & Memory Analysis
  • Analyze how AI workloads interact with system resources across CPU, GPU, and AI accelerators
  • Evaluate the impact of memory bandwidth, latency, contention, and data movement on workload performance, responsiveness, and power efficiency
  • Characterize workload behavior in shared-memory systems, including interactions between foreground and background activity
  • Identify sources of performance variability and experience degradation under real-world multitasking scenarios.
  • Overcome the performance bottleneck where processor speeds outpace memory bandwidth, focusing on optimizing data movement between CPUs, GPUs, and memory (DRAM, HBM, CXL).

System-Level Guidance & Strategy
  • Translate memory and system-level constraints into actionable guidance for platform architecture, runtime, power, and performance teams
  • Help define execution envelopes and tradeoffs (e.g., placement, concurrency limits, configuration sensitivity) that improve AI experience predictability
  • Contribute to platform-level strategy by connecting technical constraints to user experience outcomes and product decisions

Cross-Functional & Ecosystem Collaboration
  • Work closely with platform architecture, runtime, power/thermal, and AI enablement teams within HP
  • Engage with external ecosystem partners, including memory and silicon vendors, to:
    • Understand platform capabilities, tradeoffs, and roadmap directions
    • Evaluate how memory technologies and configurations affect real-world AI experiences
    • Translate partner insights into HP-specific system guidance and strategic recommendations
  • Support technical alignment discussions

Platform Enablement
  • Assist in defining internal tools, metrics, and evaluation methods for assessing AI workload behavior and memory sensitivity
  • Contribute to documentation, best practices, and internal frameworks related to system-level AI performance
  • Help scale AI experiences across a diverse portfolio of devices and SKUs
Qualifications
  • Education: M.Sc. in Computer Engineering, Electrical Engineering, or a related discipline.
  • Strong background in systems performance, platform architecture, or runtime behavior
  • Solid understanding of memory hierarchy and data movement in client or embedded systems (e.g., DRAM, caches, shared memory architectures). Strong knowledge of computer architecture, specifically memory hierarchy (DRAM, SRAM, cache), interconnect protocols (CXL, PCIe), and memory controllers.
  • Experience with Machine Learning hardware acceleration and processing-in-memory (PIM) techniques.
  • Knowledge of low-power design, given the "power wall" constraint.
  • Experience working with heterogeneous compute environments (CPU, GPU, accelerators)
  • Ability to translate low-level technical constraints into system-level guidance and platform strategy
  • Experience collaborating across hardware, software, and product organizations
  • Strong technical communication skills, including engagement with external partners

Preferred Experience
  • Client platforms (PC, mobile, embedded) rather than exclusively datacenter or HPC environments
  • On-device AI inference workloads
  • Power- and performance-sensitive system design
  • Performance analysis tools, telemetry, and data-driven evaluation
  • Prior experience engaging with memory or silicon vendors in a technical or architectural capacity
  • Programming: Proficiency in C/C++ and scripting languages (Python) for modeling and analysis.
  • Simulation Tools: Experience with architectural simulators (e.g., GEM5, Sniper) and performance analysis.

Salary
The pay range for this role is $147,050 to $230,850 USD annually with additional opportunities for pay in the form of bonus and/or equity (applies to United States of America candidates only). Pay varies by work location, job-related knowledge, skills, and experience.
Benefits:
HP offers a comprehensive benefits package for this position, including:
  • Health insurance
  • Dental insurance
  • Vision insurance
  • Long term/short term disability insurance
  • Employee assistance program
  • Flexible spending account
  • Life insurance
  • Generous time off policies, including;
  • 4-12 weeks fully paid parental leave based on tenure
  • 11 paid holidays
  • Additional flexible paid vacation and sick leave (US benefits overview)

The compensation and benefits information is accurate as of the date of this posting. The Company reserves the right to modify this information at any time, with or without notice, subject to applicable law.
Job -
Engineering
Schedule -
Full time
Shift -
No shift premium (United States of America)
Travel -
Relocation -
Equal Opportunity Employer (EEO) -
HP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s).
Please be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence.
For more information, review HP's EEO Policy or read about your rights as an applicant under the law here: "Know Your Rights: Workplace Discrimination is Illegal"