We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Analog Layout Engineer (Must- High speed Layout & Chip design) _Sanjose, CA(Onsite)_Only Xoriant W2
San Jose, CA · On-site
$110/hr
TITLE :- Analog Layout Engineer LOCATION - SanJose, CA DURATION - 12+ Months (May get extend) MODE OF INTERVIEW - Zoom/Webex/Onsite RATE - $110 per hour on W2 (Without Benefits) Must- * High speed ...
Analog Layout Engineer (Must- High speed Layout & Chip design) _Sanjose, CA(Onsite)_Only Xoriant W2
San Jose, CA · On-site
$110/hr
TITLE :- Analog Layout Engineer LOCATION - SanJose, CA DURATION - 12+ Months (May get extend) MODE OF INTERVIEW - Zoom/Webex/Onsite RATE - $110 per hour on W2 (Without Benefits) Must- * High speed ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for contributing to our latest generation ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for contributing to our latest generation ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for contributing to our latest generation ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for contributing to our latest generation ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
As an Electrical PCB Layout Engineer, you will own PCB layout execution in Altium from schematic ... Working knowledge of PCB fabrication and assembly processes, including DFM, DFA, DFT, solder-mask ...
As an Electrical PCB Layout Engineer, you will own PCB layout execution in Altium from schematic ... Working knowledge of PCB fabrication and assembly processes, including DFM, DFA, DFT, solder-mask ...
As an Electrical PCB Layout Engineer, you will own PCB layout execution in Altium from schematic ... Working knowledge of PCB fabrication and assembly processes, including DFM, DFA, DFT, solder-mask ...
Quick apply
As an Electrical PCB Layout Engineer, you will own PCB layout execution in Altium from schematic ... Working knowledge of PCB fabrication and assembly processes, including DFM, DFA, DFT, solder-mask ...
Drive the full tape-out process, including floor planning, waveguide routing, and mask data ... in programming and scripting languages (Python, SKILL, Perl, TCL, or C++) for layout automation ...
Drive the full tape-out process, including floor planning, waveguide routing, and mask data ... in programming and scripting languages (Python, SKILL, Perl, TCL, or C++) for layout automation ...
Drive the full tape-out process, including floor planning, waveguide routing, and mask data ... in programming and scripting languages (Python, SKILL, Perl, TCL, or C++) for layout automation ...
Drive the full tape-out process, including floor planning, waveguide routing, and mask data ... in programming and scripting languages (Python, SKILL, Perl, TCL, or C++) for layout automation ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117K - $195K/yr
Keysight Technologies has an opening for an Analog Layout Engineer in its ASIC/MMIC Design Center in Colorado Springs. This specific position is to support a team of ASIC/MMIC designers by laying out ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117K - $195K/yr
Keysight Technologies has an opening for an Analog Layout Engineer in its ASIC/MMIC Design Center in Colorado Springs. This specific position is to support a team of ASIC/MMIC designers by laying out ...
Senior High-speed Photodiode Design Engineer
Cupertino, CA · On-site
$160 - $230/hr
Mask layout generation * Data analysis to build correlation between performance and designs ... Work closely with internal and external epitaxial engineer, integration engineer, packaging/testing ...
Senior High-speed Photodiode Design Engineer
Cupertino, CA · On-site
$160 - $230/hr
Mask layout generation * Data analysis to build correlation between performance and designs ... Work closely with internal and external epitaxial engineer, integration engineer, packaging/testing ...
Photonics Layout and Design Automation Engineer
$154K - $209K/yr
Proficiency in commercial software tools commonly used in photonics mask layout from Cadence, Synopsys, Luceda, and Klayout * Familiarity with the semiconductor fabrication process * Experience with ...
Quick apply
Photonics Layout and Design Automation Engineer
$154K - $209K/yr
Proficiency in commercial software tools commonly used in photonics mask layout from Cadence, Synopsys, Luceda, and Klayout * Familiarity with the semiconductor fabrication process * Experience with ...
Photonics Layout and Design Automation Engineer
Mountain View, CA · On-site
$154K - $209K/yr
Proficiency in commercial software tools commonly used in photonics mask layout from Cadence, Synopsys, Luceda, and Klayout * Familiarity with the semiconductor fabrication process * Experience with ...
Photonics Layout and Design Automation Engineer
Mountain View, CA · On-site
$154K - $209K/yr
Proficiency in commercial software tools commonly used in photonics mask layout from Cadence, Synopsys, Luceda, and Klayout * Familiarity with the semiconductor fabrication process * Experience with ...
Photonics Layout and Design Automation Engineer
Mountain View, CA · On-site
$154K - $209K/yr
Proficiency in commercial software tools commonly used in photonics mask layout from Cadence, Synopsys, Luceda, and Klayout * Familiarity with the semiconductor fabrication process * Experience with ...
Photonics Layout and Design Automation Engineer
Mountain View, CA · On-site
$154K - $209K/yr
Proficiency in commercial software tools commonly used in photonics mask layout from Cadence, Synopsys, Luceda, and Klayout * Familiarity with the semiconductor fabrication process * Experience with ...
He or she shall utilize advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements. Engaging in high ...
He or she shall utilize advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements. Engaging in high ...
Staff Custom Analog Layout Engineer
San Jose, CA · On-site
$139K - $258K/yr
He or she shall utilize advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements. Engaging in high ...
Staff Custom Analog Layout Engineer
San Jose, CA · On-site
$139K - $258K/yr
He or she shall utilize advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements. Engaging in high ...
Mask Layout Engineer information
See Sunnyvale, CA salary details
$52.8K - $67.8K
4% of jobs
$67.8K - $82.8K
2% of jobs
$82.8K - $97.8K
12% of jobs
$110K is the 25th percentile. Wages below this are outliers.
$97.8K - $112.8K
9% of jobs
$112.8K - $127.8K
11% of jobs
The median wage is $141.6K / yr.
$127.8K - $142.8K
14% of jobs
$142.8K - $157.7K
22% of jobs
$160.6K is the 75th percentile. Wages above this are outliers.
$157.7K - $172.7K
9% of jobs
$172.7K - $187.7K
9% of jobs
$187.7K - $202.7K
3% of jobs
$202.7K - $217.7K
6% of jobs
$52.8K
$141.8K
$217.7K
How much do mask layout engineer jobs pay per year?
What is a mask layout engineer?
A Mask Layout Engineer is responsible for designing the physical layout of integrated circuits (ICs) based on schematic designs. They ensure that the layout meets design specifications, electrical performance criteria, and manufacturability constraints. This involves working with design rules, placement, routing, and verification tools to optimize performance and minimize errors. Mask Layout Engineers collaborate closely with circuit design teams, process engineers, and foundry teams to ensure that the final design can be successfully fabricated. Their work is critical in semiconductor manufacturing, impacting chip performance, size, and power efficiency.
What does a mask layout engineer do?
A typical day for a Mask Layout Engineer involves translating circuit schematics into precise physical layouts using specialized software, running design rule checks (DRC) and layout versus schematic (LVS) verifications, and collaborating closely with circuit designers to resolve any issues or challenges. You’ll spend a significant portion of your time ensuring that layouts meet manufacturing process constraints and optimizing for performance and manufacturability. Mask Layout Engineers often work as part of a larger IC design team, interacting regularly with other engineers, project managers, and sometimes foundry partners. This role offers opportunities to deepen your technical skills and advance towards senior layout, design, or project leadership positions over time.
What are the key skills and qualifications needed to thrive as a mask layout engineer?
A Mask Layout Engineer needs a solid background in semiconductor physics, microelectronics, and integrated circuit (IC) design, often supported by a relevant engineering degree. Proficiency with Electronic Design Automation (EDA) tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys is typically required, and familiarity with industry standards like DRC/LVS checking is valuable. Strong attention to detail, problem-solving skills, and clear communication are important soft skills for collaborating with design and verification teams. These competencies are essential to ensure accurate, reliable IC layouts that meet stringent design and manufacturing specifications.
What are popular job titles related to Mask Layout Engineer jobs in Sunnyvale, CA?
For Mask Layout Engineer jobs in Sunnyvale, CA, the most frequently searched job titles are:
What job categories do people searching Mask Layout Engineer jobs in Sunnyvale, CA look for?
The top searched job categories for Mask Layout Engineer jobs in Sunnyvale, CA are:

Nvidia rating
9.6
Based on 17 frontline employees who took The Breakroom Quiz
7th of 245 rated software companies
Job description
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to take on, that only we can pursue, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. We would love to hear from you!
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal circuit designs.
What you'll be doing:
Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools.
You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
Take part in floor planning, custom layout and verifying against design rules and schematics.
What we need to see:
Have a BSEE or equivalent experience.
Minimum of 7+ years industry experience in Mask and Layout Design.
Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
You are an authority with Cadence custom circuit design tools - particularly virtuoso.
Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield.
You are able to work effectively in a team, good interpersonal skills, enthusiasm and positive energy.
You'll be proficient in scripting languages like perl, python, skill etc.
Should have knowledge of DRC and LVS checking flows, ability to customize decks.
You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993