Job Summary This position is for a design verification/validation intern for Analog Mixed-Signal ... Familiarity with sequential and combinational logic, finite state machines, data path components ...
Job Summary This position is for a design verification/validation intern for Analog Mixed-Signal ... Familiarity with sequential and combinational logic, finite state machines, data path components ...
Example teams and focus areas include: - RTL design for machine learning accelerators (Trainium ... As an ASIC Engineer Intern, you'll contribute to real chip development work, which may include ...
Example teams and focus areas include: - RTL design for machine learning accelerators (Trainium ... As an ASIC Engineer Intern, you'll contribute to real chip development work, which may include ...
ECC Design Engineering Intern
$35 - $45/hr
... intelligence, machine learning, and eco-friendly solutions and operational practices. As we ... Perform design database management in GIT * Should be able to code RTL logic with Verilog syntax.
New
Quick apply
ECC Design Engineering Intern
$35 - $45/hr
... intelligence, machine learning, and eco-friendly solutions and operational practices. As we ... Perform design database management in GIT * Should be able to code RTL logic with Verilog syntax.
New
ECC Design Engineering Intern
San Jose, CA ยท On-site
$35 - $45/hr
... intelligence, machine learning, and eco-friendly solutions and operational practices. As we ... Perform design database management in GIT * Should be able to code RTL logic with Verilog syntax.
New
ECC Design Engineering Intern
San Jose, CA ยท On-site
$35 - $45/hr
... intelligence, machine learning, and eco-friendly solutions and operational practices. As we ... Perform design database management in GIT * Should be able to code RTL logic with Verilog syntax.
New
ECC Design Engineering Intern
San Jose, CA ยท On-site
$35 - $45/hr
... intelligence, machine learning, and eco-friendly solutions and operational practices. As we ... Perform design database management in GIT * Should be able to code RTL logic with Verilog syntax.
New
ECC Design Engineering Intern
San Jose, CA ยท On-site
$35 - $45/hr
... intelligence, machine learning, and eco-friendly solutions and operational practices. As we ... Perform design database management in GIT * Should be able to code RTL logic with Verilog syntax.
New
Filter Design Solutions Co-Op (Winter/Spring 2027)
Irvine, CA ยท On-site
$22.50 - $42/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
Filter Design Solutions Co-Op (Winter/Spring 2027)
Irvine, CA ยท On-site
$22.50 - $42/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
Hardware Test & Reliability Intern
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$58/hr
We are seeking a driven and cross-functional engineering intern to help the development and ... design iteration and robust product validation for state-of-the-art autonomous flying machines ...
Hardware Test & Reliability Intern
San Mateo, CA ยท On-site
$58/hr
We are seeking a driven and cross-functional engineering intern to help the development and ... design iteration and robust product validation for state-of-the-art autonomous flying machines ...
Hardware Test & Reliability Intern
San Mateo, CA ยท On-site
$65 - $80/hr
We are seeking a driven and cross-functional engineering intern to help the development and ... design iteration and robust product validation for state-of-the-art autonomous flying machines ...
Hardware Test & Reliability Intern
San Mateo, CA ยท On-site
$65 - $80/hr
We are seeking a driven and cross-functional engineering intern to help the development and ... design iteration and robust product validation for state-of-the-art autonomous flying machines ...
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Burlingame, CA ยท On-site
$45 - $60/hr
... a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and ... Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ...
Design Verification Intern
Burlingame, CA ยท On-site
$45 - $60/hr
... a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and ... Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ...
Design Verification Intern
Burlingame, CA ยท On-site
$45 - $60/hr
... a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and ... Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ...
Quick apply
Design Verification Intern
Burlingame, CA ยท On-site
$45 - $60/hr
... a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and ... Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ...
Design Verification Intern
$45 - $60/hr
... a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and ... Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ...
Design Verification Intern
$45 - $60/hr
... a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and ... Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ...
Filter Design Solutions Co-Op (Summer/Fall 2027)
Irvine, CA ยท On-site
$22.50 - $42/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
New
Filter Design Solutions Co-Op (Summer/Fall 2027)
Irvine, CA ยท On-site
$22.50 - $42/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
New
$22.50 - $42/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
New
$22.50 - $42/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
New
Filter Design Solutions Co-Op (Summer/Fall 2027)
$26 - $47.50/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
Filter Design Solutions Co-Op (Summer/Fall 2027)
$26 - $47.50/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
Filter Design Solutions Co-Op (Summer/Fall 2027)
Irvine, CA ยท On-site
$22.50 - $42/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
Filter Design Solutions Co-Op (Summer/Fall 2027)
Irvine, CA ยท On-site
$22.50 - $42/hr
Knowledge of statistics and machine learning methods. * Coursework in the theory and applications ... S. is currently USD $26.00 - $47.50 per hour and for a Non-Engineering intern across the U.S. is ...
These areas include design engineering, machine design, mechanical analysis, advanced 3d modeling ... As an intern on the team, you will have the opportunity to: * Design mechanical components under ...
These areas include design engineering, machine design, mechanical analysis, advanced 3d modeling ... As an intern on the team, you will have the opportunity to: * Design mechanical components under ...
Pepper Machine Harvest Intern
Woodland, CA ยท On-site
Pepper Machine Harvest Intern Advance hot and sweet pepper harvest innovations by identifying and ... Design data collection protocols and execute field experiments with attention to detail;
Pepper Machine Harvest Intern
Woodland, CA ยท On-site
Pepper Machine Harvest Intern Advance hot and sweet pepper harvest innovations by identifying and ... Design data collection protocols and execute field experiments with attention to detail;
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About the role As a Machine Learning Intern at Droyd, you'll work directly on the learning and ... Learn how model design, data quality, and hardware constraints affect real-world performance
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About the role As a Machine Learning Intern at Droyd, you'll work directly on the learning and ... Learn how model design, data quality, and hardware constraints affect real-world performance
Pepper Machine Harvest Intern
Woodland, CA ยท On-site
Pepper Machine Harvest Intern Advance hot and sweet pepper harvest innovations by identifying and ... Design data collection protocols and execute field experiments with attention to detail; Coordinate ...
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Woodland, CA ยท On-site
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Machine Learning Engineer Intern
South San Francisco, CA ยท On-site
$35/hr
We are hiring a Machine Learning Engineer Intern to develop novel neural decoders to increase ... You'll work with cross-functional teams to design new BCI functionalities and novel computer user ...
Machine Learning Engineer Intern
South San Francisco, CA ยท On-site
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Machine Design Intern information
What does a machine design intern do?
What are the key skills and qualifications needed to thrive as a machine design intern?
What kinds of projects and responsibilities can a machine design intern typically expect during their internship?
What is the difference between Machine Design Intern vs Mechanical Engineering Intern?
| Aspect | Machine Design Intern | Mechanical Engineering Intern |
|---|---|---|
| Required Credentials | Enrolled in Mechanical Engineering or related field, basic CAD skills | Enrolled in Mechanical Engineering or related field, basic engineering coursework |
| Work Environment | Design labs, CAD software, prototype testing | Design labs, manufacturing facilities, testing environments |
| Employer & Industry Usage | Manufacturers, engineering firms focusing on product design | Various industries including automotive, aerospace, manufacturing |
In summary, a Machine Design Intern focuses specifically on designing mechanical components and systems using CAD tools, often within product development teams. A Mechanical Engineering Intern has a broader scope, involving general engineering tasks across different areas like manufacturing, testing, and analysis. Both roles provide valuable industry experience but differ in specialization and daily responsibilities.
What cities in California are hiring for Machine Design Intern jobs?
Cities in California with the most Machine Design Intern job openings:
Full-time, Temporary, Internship
Posted 24 days ago
Job description
pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductorโs 30-year legacy of technology advancements and strong IP portfolio but with a new missionโto enhance Murataโs world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemiโs product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemiโs team explores new ways to make electronics for the connected world smaller, thinner, faster and better.
Job Summary
This position is for a design verification/validation intern for Analog Mixed-Signal and Digital products. The intern will assist in developing, verifying, characterizing, validating, and supporting circuit IP blocks for product development.
Roles & Responsibilities
This position has responsibility for:
- Develop and simulate self-checking, functional design verification, and validation test benches
- Development of FPGA systems using logic design and RTL coding.
- Lab Debug of FPGA prototypes using logic analyzers, oscilloscopes and signal generators.
- Modify C code controlling automated test equipment
Minimum Qualifications (Experience and Skills)
- Ability to develop RTL and run Verilog simulations
- Familiarity with FPGA development tools and lab debug of FPGA design projects
- Familiarity with sequential and combinational logic, finite state machines, data path components such as adders, comparators, subtractors, multipliers, shifters, counters, timers
- Familiarity with timing, metastability, setup/hold constraints
- Familiarity with memory components, storage elements
- Familiarity with software techniques, particularly programming in Python
- Familiarity with digital logic design and synthesis
- Understanding of CMOS silicon circuits
- Familiarity with operating lab equipment, including DIO, SMUs, and oscilloscopes
Preferred Qualifications
- Good Communication skills
- Experience with serial interface protocols such as SPI or I2C
- Experience with Cadence CAD tools, Simvision/Xcelium simulator, Genus synthesis, Innovus Auto Place, and Route
- Understanding of test vectors and digital test concepts
- Experience in ASIC front-end implementation tool flows and silicon bring-up
Education Requirements
- Fulltime enrollment in an accredited Bachelorโs degree program in Electrical Engineering or Computer Engineering (must be completing 3+ year) or MSEE candidate
Work Environment
This job operates in a professional office environment. This role routinely uses standard office equipment.
Physical Demands
The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.
Thank you for your interest in our temporary position. Please be advised that the selected candidate will be employed and receive all wages directly from a third party staffing agency selected by pSemi.
USD 32.20 - 58.32 per hour
pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driverโs license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including โprotected veteransโ under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.
Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: http://patents.psemi.com