Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog-based workflows. * Work closely with DSP, software, hardware, and systems engineers to turn algorithm ...
Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog-based workflows. * Work closely with DSP, software, hardware, and systems engineers to turn algorithm ...
Engineer
Fairfax, VA · On-site
... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...
Engineer
Fairfax, VA · On-site
... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...
... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...
... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Engineer
Fairfax, VA · On-site
... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...
Engineer
Fairfax, VA · On-site
... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...
Sr. FPGA Engineer II
$133K - $171K/yr
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Sr. FPGA Engineer II
$133K - $171K/yr
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Senior Embedded Software Engineer II/Principal with Security Clearance
Chantilly, VA · On-site
$183K - $214K/yr
Work with the hardware design team on requirements. * Complete FPGA logic design, coding ... Experience in both creating IP from scratch in RTL, and integrating existing IP into RTL and block ...
Senior Embedded Software Engineer II/Principal with Security Clearance
Chantilly, VA · On-site
$183K - $214K/yr
Work with the hardware design team on requirements. * Complete FPGA logic design, coding ... Experience in both creating IP from scratch in RTL, and integrating existing IP into RTL and block ...
Senior FPGA Development Engineer
Germantown, MD · On-site
$131K - $168K/yr
We are seeking a skilled Senior FPGA Engineer to join our innovative team at Viavi Solutions Inc ... Proficiency in Verilog/SystemVerilog for RTL design. * Experience with industry-standard EDA tools ...
Senior FPGA Development Engineer
Germantown, MD · On-site
$131K - $168K/yr
We are seeking a skilled Senior FPGA Engineer to join our innovative team at Viavi Solutions Inc ... Proficiency in Verilog/SystemVerilog for RTL design. * Experience with industry-standard EDA tools ...
Senior FPGA Development Engineer
Germantown, MD · On-site
$131K - $168K/yr
We are seeking a skilled Senior FPGA Engineer to join our innovative team at Viavi Solutions Inc ... Proficiency in Verilog/SystemVerilog for RTL design. * Experience with industry-standard EDA tools ...
Senior FPGA Development Engineer
Germantown, MD · On-site
$131K - $168K/yr
We are seeking a skilled Senior FPGA Engineer to join our innovative team at Viavi Solutions Inc ... Proficiency in Verilog/SystemVerilog for RTL design. * Experience with industry-standard EDA tools ...
FPGA Verification Engineer, Bespoke Solutions
Arlington, VA · On-site
$149K - $192K/yr
... advanced FPGA and ASIC designs. They will help architect, develop, and execute scalable ... You will collaborate with RTL designers to review specifications, identify risks, and ensure ...
FPGA Verification Engineer, Bespoke Solutions
Arlington, VA · On-site
$149K - $192K/yr
... advanced FPGA and ASIC designs. They will help architect, develop, and execute scalable ... You will collaborate with RTL designers to review specifications, identify risks, and ensure ...
Senior FPGA Development Engineer
Germantown, MD · On-site
$131K - $168K/yr
We are seeking a skilled Senior FPGA Engineer to join our innovative team at Viavi Solutions Inc ... Proficiency in Verilog/SystemVerilog for RTL design. * Experience with industry-standard EDA tools ...
Senior FPGA Development Engineer
Germantown, MD · On-site
$131K - $168K/yr
We are seeking a skilled Senior FPGA Engineer to join our innovative team at Viavi Solutions Inc ... Proficiency in Verilog/SystemVerilog for RTL design. * Experience with industry-standard EDA tools ...
FPGA Verification Engineer, Bespoke Solutions
$149K - $192K/yr
... advanced FPGA and ASIC designs. They will help architect, develop, and execute scalable ... You will collaborate with RTL designers to review specifications, identify risks, and ensure ...
FPGA Verification Engineer, Bespoke Solutions
$149K - $192K/yr
... advanced FPGA and ASIC designs. They will help architect, develop, and execute scalable ... You will collaborate with RTL designers to review specifications, identify risks, and ensure ...
Senior FPGA Engineer, Cyber
Washington, DC · On-site
$166K - $220K/yr
Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog-based workflows. * Work closely with DSP, software, hardware, and systems engineers to turn algorithm ...
Senior FPGA Engineer, Cyber
Washington, DC · On-site
$166K - $220K/yr
Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog-based workflows. * Work closely with DSP, software, hardware, and systems engineers to turn algorithm ...
FPGA Verification Engineer, Bespoke Solutions
Arlington, VA · On-site
$149K - $192K/yr
... advanced FPGA and ASIC designs. They will help architect, develop, and execute scalable ... You will collaborate with RTL designers to review specifications, identify risks, and ensure ...
FPGA Verification Engineer, Bespoke Solutions
Arlington, VA · On-site
$149K - $192K/yr
... advanced FPGA and ASIC designs. They will help architect, develop, and execute scalable ... You will collaborate with RTL designers to review specifications, identify risks, and ensure ...
Senior FPGA Development Engineer
Germantown, MD · On-site
$96 - $178/hr
Mentor junior engineers and provide technical leadership within the digital design team. This ... Proficiency in Verilog/SystemVerilog for RTL design. * Experience with industry-standard EDA tools ...
Senior FPGA Development Engineer
Germantown, MD · On-site
$96 - $178/hr
Mentor junior engineers and provide technical leadership within the digital design team. This ... Proficiency in Verilog/SystemVerilog for RTL design. * Experience with industry-standard EDA tools ...
Electrical Engineer FPGA - Level 3/4 - Dulles
Sterling, VA · On-site
$142K - $213K/yr
As a FPGA Electrical Engineer - Level 3 or Level 4 located in Dulles, VA, you'll be a linchpin in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
Electrical Engineer FPGA - Level 3/4 - Dulles
Sterling, VA · On-site
$142K - $213K/yr
As a FPGA Electrical Engineer - Level 3 or Level 4 located in Dulles, VA, you'll be a linchpin in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
FPGA Developer
Fairfax, VA · On-site
$94K - $156K/yr
... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...
FPGA Developer
Fairfax, VA · On-site
$94K - $156K/yr
... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...
Principal FPGA Engineer
Chantilly, VA · On-site
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Principal FPGA Engineer
Chantilly, VA · On-site
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Quick apply
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Sr. FPGA Engineer II
Chantilly, VA · On-site
$107K - $146K/yr
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Quick apply
Sr. FPGA Engineer II
Chantilly, VA · On-site
$107K - $146K/yr
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Locum Asic Rtl Design Engineer information
See Ashburn, VA salary details
$96.1K - $106.2K
16% of jobs
$106.2K - $116.2K
3% of jobs
$116.2K - $126.2K
4% of jobs
$129.2K is the 25th percentile. Wages below this are outliers.
$126.2K - $136.3K
6% of jobs
The median wage is $142.6K / yr.
$136.3K - $146.3K
33% of jobs
$146.3K - $156.4K
3% of jobs
$156.4K - $166.4K
2% of jobs
$173K is the 75th percentile. Wages above this are outliers.
$166.4K - $176.4K
12% of jobs
$176.4K - $186.5K
5% of jobs
$186.5K - $196.5K
4% of jobs
$196.5K - $206.6K
12% of jobs
$96.1K
$153.6K
$206.6K
How much do locum asic rtl design engineer jobs pay per year?
As of Aug 19, 2026, the average yearly pay for locum asic rtl design engineer in Ashburn, VA is $153,591.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,500.00 and $184,100.00 per year, depending on experience, location, and employer.
What is the difference between Locum Asic Rtl Design Engineer vs Contract Asic Rtl Design Engineer?
| Aspect | Locum Asic Rtl Design Engineer | Contract Asic Rtl Design Engineer |
|---|---|---|
| Credentials | Typically requires relevant engineering degrees and RTL design experience | Similar credentials, often with specific RTL design certifications |
| Work Environment | Temporary, short-term assignments often in multiple locations | Project-based roles, usually in a fixed location or remote |
| Employer Usage | Used by agencies or companies needing immediate, short-term expertise | Engaged by companies or staffing agencies for project-specific work |
Both roles involve RTL design skills for ASIC development, but a Locum Asic Rtl Design Engineer typically fills short-term, temporary positions, often through staffing agencies, while a Contract Asic Rtl Design Engineer is engaged for specific projects with defined durations. The main difference lies in the nature and duration of employment, but both require similar technical credentials and work environments.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Ashburn, VA?
The most popular types of Asic Rtl Design Engineer jobs in Ashburn, VA are:
What are popular job titles related to Locum Asic Rtl Design Engineer jobs in Ashburn, VA?
For Locum Asic Rtl Design Engineer jobs in Ashburn, VA, the most frequently searched job titles are:
- Asic Verification Engineer
- Freelance Analog Ic Design Engineer
- Vice President Asic Design Engineer
- Remote Asic Soc Design Engineer
- Remote Asic Design Engineer
- Work From Home Analog Mixed Signal Design Engineer
- Remote Power Supply Design Engineer
- Freelance Asic Verification Engineer
- Freelance Fpga Verification Engineer
- Remote Asic Design
What job categories do people searching Locum Asic Rtl Design Engineer jobs in Ashburn, VA look for?
The top searched job categories for Locum Asic Rtl Design Engineer jobs in Ashburn, VA are:
Anduril rating
9.1
Anduril
Based on 17 frontline employees who took The Breakroom Quiz
7.4
Manufacturers average
Based on 75,610 frontline employees who took The Breakroom Quiz
Job description
ABOUT THE TEAM
Anduril Cyber is focused on positioning Anduril as a lead provider of capabilities to enable offensive cyber missions. Cyber is a new business line at Anduril, and relies upon our fleet of autonomous vehicles, Lattice operating system, mesh networks, and other hardware products to engage in cyber operations at the edge. We design and build novel solutions to deploy cyber capabilities in unconventional or difficult to reach environments Anduril Cyber is hiring a Software Engineer focused on embedded and mission software integration. Strong candidates may lean more heavily toward embedded-platform or mission/backend work, but should be comfortable collaborating across adjacent layers that connect devices, operators, and data products.
ABOUT THE JOBAnduril Cyber is hiring an FPGA Engineer with deep experience in high-throughput FPGA/SoC digital design, precision timing, and hardware/software integration. The role is defined around the technical depth and execution patterns reflected in the hiring plan and representative resume set without assuming a fixed silicon choice this early.
- Design and implement high-throughput FPGA datapaths, packetization pipelines, timing-sensitive interfaces, and hardware-near acceleration blocks.
- Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog-based workflows.
- Work closely with DSP, software, hardware, and systems engineers to turn algorithm and interface requirements into robust FPGA implementations.
- Drive precision timing, synchronization, and throughput closure for the selected FPGA/SoC platform and adjacent high-speed digital interfaces.
- Document architectures, interfaces, and verification approaches clearly enough for cross-functional integration and long-term maintainability.
- Support design reviews, technical trade studies, and lab debugging with a hands-on, player-coach engineering mindset.
- Strong experience with FPGA development on Xilinx or comparable platforms, including SoC/MPSoC-based or other high-performance digital devices relevant to SDR systems.
- Proficiency in VHDL, Verilog, or SystemVerilog, including simulation, timing closure, and resource/performance tradeoffs.
- Experience building high-speed digital interfaces and datapaths such as Ethernet-based packet movement, DMA-adjacent flows, or streaming signal pipelines.
- Hands-on familiarity with precision timing, synchronization, sysref/clocking concepts, and deterministic interface behavior.
- Experience with FPGA verification methodologies and automation, including regression-oriented testbenches and CI-backed validation.
- Ability to collaborate effectively with software and DSP engineers on register interfaces, control surfaces, and integration boundaries.
- Comfort debugging in the lab using oscilloscopes, logic analyzers, spectrum analyzers, or related instrumentation.
- Strong written and verbal communication skills for technical design reviews and cross-functional engineering work
- Experience with cocotb, GitLab CI/CD, or similar automation for FPGA verification and release confidence.
- Background in FFT/channelization pipelines, PSD generation, AGC-adjacent blocks, or other signal-processing-oriented FPGA implementations.
- Familiarity with embedded software interfaces to FPGA systems, including Linux-based control planes and hardware/software co-debug.
- Experience presenting architecture and implementation details in customer-facing or formal design-review settings.
- Track record of mentoring other engineers and improving design quality across a broader FPGA/DSP team.
Working at Anduril
About Anduril, in their own words
From Anduril
As the world enters an era of strategic competition, Anduril delivers cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the warfighter in months, not years.
About Anduril Industries
Sourced by ZipRecruiter
Anduril Industries is a trailblazer in the technology industry based in Costa Mesa, CA, US. Founded in 2017 by Palmer Luckey, the creator of Oculus VR, the company focuses on developing innovative technology to equip and empower those in the defense sector. Its primary products include cutting-edge autonomous systems and AI software that assist in combating threats to national and global security. The mission of Anduril Industries is to integrate technology and defense by building transformative, scalable solutions that ensure a safer world.
Industry
Guided missile and space vehicle manufacturing
Company size
501 - 1,000 Employees
Headquarters location
Costa Mesa, CA, US
Year founded
2017